forked from Imagelibrary/rtems
9e42e61e6e
This moves the management console implementation into its own file so that BSPs which do not need it do not carry the code around with them. Closes #5120
135 lines
3.8 KiB
C
135 lines
3.8 KiB
C
/* SPDX-License-Identifier: BSD-2-Clause */
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/**
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* @file
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*
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* @ingroup RTEMSBSPsAArch64XilinxZynqMP
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*
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* @brief This header file provides BSP-specific interfaces.
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*/
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/*
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* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
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* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef LIBBSP_AARCH64_XILINX_ZYNQMP_BSP_H
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#define LIBBSP_AARCH64_XILINX_ZYNQMP_BSP_H
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#include <bspopts.h>
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#define BSP_FEATURE_IRQ_EXTENSION
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#define BSP_RESET_SMC
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#define BSP_CPU_ON_USES_SMC
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#ifndef ASM
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#include <bsp/default-initial-extension.h>
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#include <bsp/start.h>
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#include <rtems.h>
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#include <dev/serial/zynq-uart-zynqmp.h>
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#ifdef __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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struct rtems_termios_device_context;
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/**
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* @defgroup RTEMSBSPsAArch64XilinxZynqMP \
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* AMD Zynq UltraScale+ MPSoC and RFSoC - Application Processing Unit
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*
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* @ingroup RTEMSBSPsAArch64
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*
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* @brief This group contains the BSP for the Application Processing Unit (APU)
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* contained in AMD Zynq UltraScale+ MPSoC and RFSoC devices.
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*
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* @{
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*/
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/*
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* DDRMC mapping
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*/
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LINKER_SYMBOL(bsp_r0_ram_base)
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LINKER_SYMBOL(bsp_r0_ram_end)
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LINKER_SYMBOL(bsp_r1_ram_base)
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LINKER_SYMBOL(bsp_r1_ram_end)
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#define BSP_ARM_GIC_CPUIF_BASE 0xf9020000
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#define BSP_ARM_GIC_DIST_BASE 0xf9010000
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#define BSP_FDT_IS_SUPPORTED
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extern unsigned int zynqmp_dtb_len;
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extern unsigned char zynqmp_dtb[];
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#define NANDPSU_BASEADDR 0xFF100000
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/**
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* @brief Zynq UltraScale+ MPSoC specific set up of the MMU.
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*
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* Provide in the application to override the defaults in the BSP.
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*/
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BSP_START_TEXT_SECTION void zynqmp_setup_mmu_and_cache(void);
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/**
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* @brief Zynq UltraScale+ MPSoC specific set up of the MMU for non-primary
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* cores.
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*
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* Provide in the application to override the defaults in the BSP.
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*/
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BSP_START_TEXT_SECTION void zynqmp_setup_secondary_cpu_mmu_and_cache( void );
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void zynqmp_management_console_termios_init(void);
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void zynqmp_debug_console_flush(void);
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uint32_t zynqmp_clock_i2c0(void);
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uint32_t zynqmp_clock_i2c1(void);
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/**
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* @brief Zynq UltraScale+ MPSoC specific set up of a management console.
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*
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* Some systems may have a management interface which needs special
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* initialization. Provide in the application to override the defaults in the
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* BSP. This will only be called if the interface is found in the device tree.
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*/
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void zynqmp_configure_management_console(
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struct rtems_termios_device_context *base
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);
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/** @} */
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#ifdef __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* ASM */
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#endif /* LIBBSP_AARCH64_XILINX_ZYNQMP_BSP_H */
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