forked from Imagelibrary/rtems
31715959fe
These files were written by a combination of contributors who have given permisison to relicense. Updates #3053
111 lines
3.9 KiB
C
111 lines
3.9 KiB
C
/* SPDX-License-Identifier: BSD-2-Clause */
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/**
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* @file
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*
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* @ingroup raspberrypi_interrupt
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*
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* @brief Interrupt definitions.
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*/
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/**
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* Copyright (c) 2013 Alan Cudmore
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* Copyright (c) 2022 Mohd Noor Aman
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* Copyright (c) 2024 Ning Yang
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef LIBBSP_ARM_RASPBERRYPI_IRQ_H
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#define LIBBSP_ARM_RASPBERRYPI_IRQ_H
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#ifndef ASM
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#include <rtems.h>
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#include <dev/irq/arm-gic-irq.h>
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/**
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* @defgroup raspberrypi_interrupt Interrrupt Support
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*
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* @ingroup RTEMSBSPsARMRaspberryPi
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*
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* @brief Interrupt support.
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*/
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#define BCM2835_INTC_TOTAL_IRQ 216
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#define BCM2835_IRQ_SET1_MIN 0
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#define BCM2835_IRQ_SET2_MIN 32
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#define BCM2711_IRQ_VC_PERIPHERAL_BASE 96
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/* Interrupt Vectors: System Timer */
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#define BCM2835_IRQ_ID_GPU_TIMER_M0 (BCM2711_IRQ_VC_PERIPHERAL_BASE + 0)
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#define BCM2835_IRQ_ID_GPU_TIMER_M1 (BCM2711_IRQ_VC_PERIPHERAL_BASE + 1)
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#define BCM2835_IRQ_ID_GPU_TIMER_M2 (BCM2711_IRQ_VC_PERIPHERAL_BASE + 2)
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#define BCM2835_IRQ_ID_GPU_TIMER_M3 (BCM2711_IRQ_VC_PERIPHERAL_BASE + 3)
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/* Interrupt Vectors: SPI */
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#define BCM2711_IRQ_SPI (BCM2711_IRQ_VC_PERIPHERAL_BASE + 54)
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/* Interrupt Vectors: Videocore */
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#define BCM2711_IRQ_VC_PERIPHERAL_BASE 96
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#define BCM2711_IRQ_AUX (BCM2711_IRQ_VC_PERIPHERAL_BASE + 29)
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#define BCM2711_IRQ_PL011_UART (BCM2711_IRQ_VC_PERIPHERAL_BASE + 57)
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#define BCM2835_IRQ_ID_USB 9
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#define BCM2835_IRQ_ID_AUX 29
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#define BCM2835_IRQ_ID_SPI_SLAVE 43
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#define BCM2835_IRQ_ID_PWA0 45
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#define BCM2835_IRQ_ID_PWA1 46
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#define BCM2835_IRQ_ID_SMI 48
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#define BCM2835_IRQ_ID_GPIO_0 49
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#define BCM2835_IRQ_ID_GPIO_1 50
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#define BCM2835_IRQ_ID_GPIO_2 51
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#define BCM2835_IRQ_ID_GPIO_3 52
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#define BCM2835_IRQ_ID_I2C 53
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#define BCM2835_IRQ_ID_SPI 54
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#define BCM2835_IRQ_ID_PCM 55
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#define BCM2835_IRQ_ID_UART 57
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#define BCM2835_IRQ_ID_SD 62
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#define BCM2835_IRQ_ID_BASIC_BASE_ID 64
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#define BCM2835_IRQ_ID_TIMER_0 64
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#define BCM2835_IRQ_ID_MAILBOX_0 65
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#define BCM2835_IRQ_ID_DOORBELL_0 66
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#define BCM2835_IRQ_ID_DOORBELL_1 67
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#define BCM2835_IRQ_ID_GPU0_HALTED 68
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#define BCM2835_IRQ_ID_GPU1_HALTED 69
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#define BCM2835_IRQ_ID_ILL_ACCESS_1 70
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#define BCM2835_IRQ_ID_ILL_ACCESS_0 71
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#define BSP_TIMER_VIRT_PPI 27
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#define BSP_TIMER_PHYS_NS_PPI 30
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#define BSP_VPL011_SPI 32
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#define BSP_INTERRUPT_VECTOR_COUNT BCM2835_INTC_TOTAL_IRQ
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#define BSP_INTERRUPT_VECTOR_INVALID (UINT32_MAX)
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#define BSP_IRQ_COUNT (BCM2835_INTC_TOTAL_IRQ)
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#endif /* ASM */
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#endif /* LIBBSP_ARM_RASPBERRYPI_IRQ_H */
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