forked from Imagelibrary/rtems
9384ac2d65
This patch changes the license to BSD-2 for all source files where the copyright is held by Aeroflex Gaisler, Cobham Gaisler, or Gaisler Research. Some files also includes copyright right statements from OAR and/or embedded Brains in addition to Gaisler. Updates #3053.
83 lines
2.8 KiB
C
83 lines
2.8 KiB
C
/* SPDX-License-Identifier: BSD-2-Clause */
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/**
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* @file
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*
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* @brief PCI Auto Configuration Library
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*/
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/*
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* COPYRIGHT (c) 2010 Cobham Gaisler AB.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __PCI_CFG_AUTO_H__
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#define __PCI_CFG_AUTO_H__
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#define CFGOPT_NOSETUP_IRQ 0x1 /* Skip IRQ setup */
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/* PCI Memory Layout setup, used by the auto-config library in order to
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* determine the addresses of PCI BARs and Buses.
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*
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* All addresses are in PCI address space, the actual address the CPU access
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* may be different, and taken care of elsewhere.
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*/
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struct pci_auto_setup {
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int options;
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/* PCI prefetchable Memory space (OPTIONAL) */
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uint32_t mem_start;
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uint32_t mem_size; /* 0 = Use MEMIO space for prefetchable mem BARs */
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/* PCI non-prefetchable Memory */
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uint32_t memio_start;
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uint32_t memio_size;
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/* PCI I/O space (OPTIONAL) */
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uint32_t io_start;
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uint32_t io_size; /* 0 = No I/O space */
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/* Get System IRQ connected to a PCI line of a PCI device on bus0.
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* The return IRQ value zero equals no IRQ (IRQ disabled).
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*/
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uint8_t (*irq_map)(pci_dev_t dev, int irq_pin);
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/* IRQ Bridge routing. Returns the interrupt pin (0..3 = A..D) that
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* a device is connected to on parent bus.
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*/
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int (*irq_route)(pci_dev_t dev, int irq_pin);
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};
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/* Do PCI initialization: Enumrate buses, scan buses for devices, assign
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* I/O MEM and MEMIO resources, assign IRQ and so on.
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*/
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extern int pci_config_auto(void);
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/* Register a configuration for the auto library (struct pci_auto_setup *) */
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extern void pci_config_auto_register(void *config);
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/* PCI memory map */
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extern struct pci_auto_setup pci_auto_cfg;
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#endif
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