forked from Imagelibrary/rtems
119 lines
2.6 KiB
C
119 lines
2.6 KiB
C
/**
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* @file
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*
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* @ingroup RTEMSBSPsPowerPCSS555
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*
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* @brief Global BSP definitions.
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*/
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/*
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* This file includes definitions for the Intec SS555.
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*/
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/*
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* SS555 port sponsored by Defence Research and Development Canada - Suffield
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* Copyright (C) 2004, Real-Time Systems Inc. (querbach@realtime.bc.ca)
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*
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* Derived from c/src/lib/libbsp/powerpc/mbx8xx/include/bsp.h:
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*
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* COPYRIGHT (c) 1989-1998.
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* On-Line Applications Research Corporation (OAR).
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#ifndef LIBBSP_POWERPC_SS555_BSP_H
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#define LIBBSP_POWERPC_SS555_BSP_H
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/**
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* @defgroup RTEMSBSPsPowerPCSS555 SS555
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*
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* @ingroup RTEMSBSPsPowerPC
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*
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* @brief SS555 Board Support Package.
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*
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* @{
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*/
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#include <bspopts.h>
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#ifdef ASM
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#define eie 0x050 /* External Interrupt Enable Register */
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#define eid 0x051 /* External Interrupt Disable Register */
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#define nri 0x052 /* Non-Recoverable Interrupt Register */
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#else /* !ASM */
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#include <bsp/default-initial-extension.h>
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#include <rtems.h>
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#include <mpc5xx.h>
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#include <mpc5xx/console.h>
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#include <libcpu/vectors.h>
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#include <bsp/irq.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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* Clock definitions
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*/
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#define BSP_CRYSTAL_HZ 4000000 /* crystal frequency, Hz */
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#define BSP_CLOCK_HZ 40000000 /* CPU clock frequency, Hz */
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/*
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* I/O definitions
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*
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* The SS555 board includes a CPLD to control on-board features and
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* off-board devices.
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*/
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typedef struct cpld_ {
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uint8_t cs3a[32]; /* Chip select 3A */
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uint8_t pad0[0x200000 - 0x000020];
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uint8_t cs3b[32]; /* Chip select 3B */
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uint8_t pad2[0x400000 - 0x200020];
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uint8_t cs3c[32]; /* Chip select 3C */
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uint8_t pad4[0x600000 - 0x400020];
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uint8_t cs3d[32]; /* Chip select 3D */
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uint8_t pad6[0x800000 - 0x600020];
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uint8_t serial_ints; /* Enable/disable serial interrupts */
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uint8_t serial_resets; /* Enable/disable serial resets */
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uint8_t serial_ack; /* Acknowledge serial transfers */
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uint8_t pad8[0xA00000 - 0x800003];
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uint8_t iflash_writess; /* Enable/disable internal-flash writes */
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uint8_t nflash_writess; /* Enable/disable NAND-flash writes */
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uint8_t padA[0xC00000 - 0xA00002];
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} cpld_t;
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extern volatile cpld_t cpld; /* defined in linkcmds */
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/* clock/p_clock.c */
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extern int BSP_disconnect_clock_handler (void);
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extern int BSP_connect_clock_handler (rtems_irq_hdl hdl);
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/*
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* Prototypes for methods called from .S to support dependency tracking.
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*/
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void _InitSS555(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* !ASM */
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/** @} */
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#endif
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