forked from Imagelibrary/rtems
8bac4851a6
* new-exceptions/bspsupport/ppc_exc_asm_macros.S, new-exceptions/bspsupport/ppc_exc_bspsupp.h, new-exceptions/bspsupport/ppc_exc_hdl.c, new-exceptions/bspsupport/vectors_init.c: fixed and enabled stack-switching algorithm which figures out if we already run on the ISR stack rather than relying on the _ISR_Nest_level. Added 'ppc_exc_crit_always_enabled' variable which defines the semantics of critical interrupts. Added a test to TEST_LOCK_crit so that calling ppc_exc_wrapup() (and possibly the dispatcher) is always skipped if the BSP/user wants to leave critical interrupts always enabled (at the expense of having no OS support). changed TEST_LOCK_mchk so that asynchronous machine-check handlers never call ppc_exc_wrapup() (and the dispatcher). We don't want to disable MSR_ME ever (to avoid checkstops) and hence asynchronous MEs must not use OS services anyways. added and commented new variables 'ppc_exc_intr_stack_size' 'ppc_exc_crit_always_enabled'.
# # $Id$ # This is the README file for libcpu. This directory contains reusable libraries which are CPU dependent but not target board dependent. For example, the PowerPC has an on CPU decrementer register which may be used by all PowerPC BSP's for the Clock and Timer Drivers. Other examples include the caching support for the m68k CPU models and MIPS CPU model exception vectoring routines. This level of support will make it easier for others developing embedded applications on a given CPU.