forked from Imagelibrary/rtems
5ed0035377
Sort the .noinit* input sections by name first, then by alignment if two sections have the same name. This allows the placement of begin/end symbols to initialize some areas with a special value. Update #4678.
252 lines
7.5 KiB
Plaintext
252 lines
7.5 KiB
Plaintext
/*
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* This is an adapted linker script from egcs-1.0.1
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*
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* Memory layout for an SH7045F with main memory in area 2
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* This memory layout it very similar to that used for Hitachi's
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* EVB with CMON in FLASH
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*
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* NOTE: The ram start address may vary, all other start addresses are fixed
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* Not suiteable for gdb's simulator
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*
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* Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
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* Bernd Becker (becker@faw.uni-ulm.de)
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*
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* COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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*
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*
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* COPYRIGHT (c) 1998.
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* On-Line Applications Research Corporation (OAR).
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*
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* Modified to reflect SH7045F processor and EVB:
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* John M. Mills (jmills@tga.com)
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* TGA Technologies, Inc.
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* 100 Pinnacle Way, Suite 140
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* Norcross, GA 30071 U.S.A.
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*
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* This modified file may be copied and distributed in accordance
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* the above-referenced license. It is provided for critique and
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* developmental purposes without any warranty nor representation
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* by the authors or by TGA Technologies.
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*/
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OUTPUT_ARCH(sh)
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ENTRY(_start)
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STARTUP(start.o)
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/* These assignments load code into SH7045F EVB SRAM for monitor debugging */
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_RamBase = DEFINED(_RamBase) ? _RamBase : 0x00440000;
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_RamSize = DEFINED(_RamSize) ? _RamSize : 512K;
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_RamEnd = _RamBase + _RamSize;
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_HeapSize = DEFINED(_HeapSize) ? _HeapSize : 0x0;
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MEMORY
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{
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rom : o = 0x00400000, l = 0x00040000
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ram : o = 0x00440000, l = 0x00080000
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onchip_peri : o = 0xFFFF8000, l = 0x00000800
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onchip_ram : o = 0xFFFFF000, l = 0x00001000
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}
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/* Sections are defined for RAM loading and monitor debugging */
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SECTIONS
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{
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/* boot vector table */
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.monvects 0x00400000 (NOLOAD): {
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_monvects = . ;
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} > rom
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/* monitor play area */
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.monram 0x00440000 (NOLOAD) :
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{
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_ramstart = .;
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} > ram
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/* monitor vector table */
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.vects 0x00442000 (NOLOAD) : {
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_vectab = . ;
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*(.vects);
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}
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/* Read-only sections, merged into text segment: */
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. = 0x00444000 ;
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.interp : { *(.interp) }
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.hash : { *(.hash) }
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.dynsym : { *(.dynsym) }
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.dynstr : { *(.dynstr) }
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.gnu.version : { *(.gnu.version) }
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.gnu.version_d : { *(.gnu.version_d) }
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.gnu.version_r : { *(.gnu.version_r) }
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.rela.dyn :
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{
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*(.rela.init)
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*(.rela.text .rela.text.* .rela.gnu.linkonce.t.*)
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*(.rela.fini)
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*(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*)
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*(.rela.data .rela.data.* .rela.gnu.linkonce.d.*)
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*(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*)
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*(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*)
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*(.rela.ctors)
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*(.rela.dtors)
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*(.rela.got)
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*(.rela.sdata .rela.sdata.* .rela.gnu.linkonce.s.*)
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*(.rela.sbss .rela.sbss.* .rela.gnu.linkonce.sb.*)
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*(.rela.sdata2 .rela.sdata2.* .rela.gnu.linkonce.s2.*)
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*(.rela.sbss2 .rela.sbss2.* .rela.gnu.linkonce.sb2.*)
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*(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*)
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} >ram
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.rel.text :
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{ *(.rel.text) *(.rel.gnu.linkonce.t*) }
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.rel.data :
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{ *(.rel.data) *(.rel.gnu.linkonce.d*) }
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.rel.rodata :
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{ *(.rel.rodata) *(.rel.gnu.linkonce.r*) }
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.rel.got : { *(.rel.got) }
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.rel.ctors : { *(.rel.ctors) }
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.rel.dtors : { *(.rel.dtors) }
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.rel.init : { *(.rel.init) }
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.rel.fini : { *(.rel.fini) }
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.rel.bss : { *(.rel.bss) }
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.rel.plt : { *(.rel.plt) }
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.init : { *(.init) } =0
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.plt : { *(.plt) }
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.text . :
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{
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*(.text*)
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*(.stub)
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/*
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* Special FreeBSD sysctl sections.
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*/
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. = ALIGN (16);
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___start_set_sysctl_set = .;
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*(set_sysc*); /* set_sysctl_* but name is truncated by SH-coff */
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___stop_set_sysctl_set = ABSOLUTE(.);
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*(set_doma*); /* set_domain_* but name is truncated by SH-coff */
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*(set_pseudo_*);
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/* .gnu.warning sections are handled specially by elf32.em. */
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*(.gnu.warning)
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*(.gnu.linkonce.t*)
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} > ram
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_etext = .;
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PROVIDE (etext = .);
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.fini . : { *(.fini) } > ram =0
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.rodata . : { *(.rodata) KEEP (*(SORT(.rtemsroset.*))) *(.gnu.linkonce.r*) } > ram
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.rodata1 . : { *(.rodata1) } > ram
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.tdata : {
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__TLS_Data_begin = .;
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*(.tdata .tdata.* .gnu.linkonce.td.*)
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__TLS_Data_end = .;
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} > ram
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.tbss : {
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__TLS_BSS_begin = .;
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*(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon)
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__TLS_BSS_end = .;
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} > ram
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__TLS_Data_size = __TLS_Data_end - __TLS_Data_begin;
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__TLS_Data_begin = __TLS_Data_size != 0 ? __TLS_Data_begin : __TLS_BSS_begin;
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__TLS_Data_end = __TLS_Data_size != 0 ? __TLS_Data_end : __TLS_BSS_begin;
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__TLS_BSS_size = __TLS_BSS_end - __TLS_BSS_begin;
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__TLS_Size = __TLS_BSS_end - __TLS_Data_begin;
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__TLS_Alignment = MAX (ALIGNOF (.tdata), ALIGNOF (.tbss));
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/* Adjust the address for the data segment. We want to adjust up to
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the same address within the page on the next page up. */
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. = ALIGN(128) + (. & (128 - 1));
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.data . :
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{
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*(.data)
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KEEP (*(SORT(.rtemsrwset.*)))
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*(.gnu.linkonce.d*)
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CONSTRUCTORS
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} > ram
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.data1 . : { *(.data1) }
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.ctors . :
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{
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___ctors = .;
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*(.ctors)
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___ctors_end = .;
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}
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.dtors . :
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{
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___dtors = .;
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*(.dtors)
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___dtors_end = .;
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}
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.got . : { *(.got.plt) *(.got) }
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.dynamic . : { *(.dynamic) }
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/* We want the small data sections together, so single-instruction offsets
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can access them all, and initialized data all before uninitialized, so
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we can shorten the on-disk segment size. */
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.sdata . : { *(.sdata) }
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_edata = .;
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PROVIDE (edata = .);
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__bss_start = .;
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.sbss . : { *(.sbss*) *(.scommon) }
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.bss . :
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{
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*(.dynbss)
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*(.bss .bss* .gnu.linkonce.b*)
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*(COMMON)
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} > ram
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_end = . ;
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PROVIDE (end = .);
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.noinit (NOLOAD) : {
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*(SORT_BY_NAME (SORT_BY_ALIGNMENT (.noinit*)))
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} > ram
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.rtemsstackidle (NOLOAD) : {
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*(SORT(.rtemsstack.idle*))
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} > ram
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_WorkAreaBase = . ;
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.rtemsstack (NOLOAD) : {
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*(SORT(.rtemsstack.*))
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} > onchip_ram
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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/* DWARF debug sections.
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Symbols in the DWARF debugging sections are relative to the beginning
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of the section so we begin them at 0. */
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/* DWARF 1 */
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.debug 0 : { *(.debug) }
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.line 0 : { *(.line) }
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/* GNU DWARF 1 extensions */
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.debug_srcinfo 0 : { *(.debug_srcinfo) }
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.debug_sfnames 0 : { *(.debug_sfnames) }
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/* DWARF 1.1 and DWARF 2 */
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.debug_aranges 0 : { *(.debug_aranges) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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/* DWARF 2 */
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.debug_info 0 : { *(.debug_info) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_line 0 : { *(.debug_line) }
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.debug_frame 0 : { *(.debug_frame) }
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.debug_str 0 : { *(.debug_str) }
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.debug_loc 0 : { *(.debug_loc) }
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.debug_macinfo 0 : { *(.debug_macinfo) }
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/* SGI/MIPS DWARF 2 extensions */
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.debug_weaknames 0 : { *(.debug_weaknames) }
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.debug_funcnames 0 : { *(.debug_funcnames) }
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.debug_typenames 0 : { *(.debug_typenames) }
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.debug_varnames 0 : { *(.debug_varnames) }
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/* These must appear regardless of . */
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}
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