forked from Imagelibrary/rtems
171 lines
3.7 KiB
C
171 lines
3.7 KiB
C
/*
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* This file contains the basic algorithms for all assembly code used
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* in an specific CPU port of RTEMS. These algorithms must be implemented
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* in assembly language
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*
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* NOTE: This port uses a C file with inline assembler instructions
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*
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* Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
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* Bernd Becker (becker@faw.uni-ulm.de)
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*
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* COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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*
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*
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* COPYRIGHT (c) 1998.
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* On-Line Applications Research Corporation (OAR).
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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/*
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* This is supposed to be an assembly file. This means that system.h
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* and cpu.h should not be included in a "real" cpu_asm file. An
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* implementation in assembly should include "cpu_asm.h"
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*/
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#include <rtems/score/cpu.h>
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#include <rtems/score/isr.h>
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#include <rtems/score/threaddispatch.h>
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#include <rtems/score/sh.h>
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#include <rtems/score/ispsh7045.h>
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#include <rtems/score/iosh7045.h>
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#include <rtems/score/sh_io.h>
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unsigned long *_old_stack_ptr;
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register unsigned long *stack_ptr __asm__ ("r15");
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/*
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* sh_set_irq_priority
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*
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* this function sets the interrupt level of the specified interrupt
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*
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* parameters:
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* - irq : interrupt number
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* - prio: priority to set for this interrupt number
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*
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* returns: 0 if ok
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* -1 on error
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*/
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unsigned int sh_set_irq_priority(
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unsigned int irq,
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unsigned int prio )
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{
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uint32_t shiftcount;
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uint32_t prioreg;
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uint16_t temp16;
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ISR_Level level;
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/*
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* first check for valid interrupt
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*/
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if (( irq > 156) || (irq < 64) || (_Hardware_isr_Table[irq] == _dummy_isp))
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return -1;
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/*
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* check for valid irq priority
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*/
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if ( prio > 15 )
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return -1;
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/*
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* look up appropriate interrupt priority register
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*/
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if ( irq > 71)
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{
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irq = irq - 72;
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shiftcount = 12 - ((irq & ~0x03) % 16);
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switch( irq / 16)
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{
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case 0: { prioreg = INTC_IPRC; break;}
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case 1: { prioreg = INTC_IPRD; break;}
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case 2: { prioreg = INTC_IPRE; break;}
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case 3: { prioreg = INTC_IPRF; break;}
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case 4: { prioreg = INTC_IPRG; break;}
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case 5: { prioreg = INTC_IPRH; break;}
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default: return -1;
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}
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}
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else
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{
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shiftcount = 12 - 4 * ( irq % 4);
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if ( irq > 67)
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prioreg = INTC_IPRB;
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else
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prioreg = INTC_IPRA;
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}
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/*
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* Set the interrupt priority register
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*/
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_ISR_Local_disable( level );
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temp16 = read16( prioreg);
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temp16 &= ~( 15 << shiftcount);
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temp16 |= prio << shiftcount;
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write16( temp16, prioreg);
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_ISR_Local_enable( level );
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return 0;
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}
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/*
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* This routine provides the RTEMS interrupt management.
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*/
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void __ISR_Handler( uint32_t vector)
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{
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ISR_Level level;
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_ISR_Local_disable( level );
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_Thread_Dispatch_disable();
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if ( _ISR_Nest_level == 0 )
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{
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/* Install irq stack */
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_old_stack_ptr = stack_ptr;
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stack_ptr = _CPU_Interrupt_stack_high;
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}
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_ISR_Nest_level++;
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_ISR_Local_enable( level );
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/* call isp */
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if ( _ISR_Vector_table[ vector])
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(*_ISR_Vector_table[ vector ])( vector );
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_ISR_Local_disable( level );
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_Thread_Dispatch_unnest( _Per_CPU_Get() );
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_ISR_Nest_level--;
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if ( _ISR_Nest_level == 0 )
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/* restore old stack pointer */
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stack_ptr = _old_stack_ptr;
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_ISR_Local_enable( level );
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if ( _ISR_Nest_level )
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return;
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if ( !_Thread_Dispatch_is_enabled() ) {
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return;
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}
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if ( _Thread_Dispatch_necessary ) {
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_Thread_Dispatch();
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}
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}
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