forked from Imagelibrary/rtems
d7196bfd66
1396/bsps * pci/pci.c : Updated it to be consistent with the original pci.c * written by Eric Valette. There is no change in its function. * irq/irq_init.c : set defaultIrq->next_handler to be 0 * for BSP_SHARED_HANDLER_SUPPORT. * network/if_1GHz/if_wm.c : fixed some bugs in the 1GHz driver. * irq/BSP_irq.c : added supports for shared IRQ. * pci/pci_interface.c : Enabled PCI "Read", "Read Line", and "Read Multiple" * Agressive Prefetch to improve the performance of the PCI based * applications (e.g. 1GHz NIC). * irq/BSP_irq.c : Replaced the irq/irq.c, and used GT_GPP_Value * register to monitor the cause of the level sensitive interrupts. * This unique solution solves various bugs in the 1GHz network drivers * Fixed bugs in compute_pic_masks_from_prio()
133 lines
3.2 KiB
C
133 lines
3.2 KiB
C
/* vmeconfig.c,v 1.1.2.2 2003/03/25 16:46:01 joel Exp */
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/* Standard VME bridge configuration for PPC boards */
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/* Copyright Author: Till Straumann <strauman@slac.stanford.edu>, 3/2002 */
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/* Copyright 2004, Brookhaven National Lab. and S. Kate Feng <feng1@bnl.gov>
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* Modified to support the MVME5500, 3/2004
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*/
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#include <bsp.h>
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#include <bsp/VME.h>
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#include <bsp/VMEConfig.h>
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#include <bsp/vmeUniverse.h>
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#include <bsp/irq.h>
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#include <libcpu/bat.h>
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/* Use a weak alias for the VME configuration.
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* This permits individual applications to override
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* this routine.
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* They may even create an 'empty'
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*
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* void BSP_vme_config(void) {}
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*
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* which will avoid linking in the Universe driver
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* at all :-).
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*/
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void BSP_vme_config(void) __attribute__ (( weak, alias("__BSP_default_vme_config") ));
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/* translate through host bridge and vme master window of vme bridge */
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int
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BSP_vme2local_adrs(unsigned long am, unsigned long vmeaddr, unsigned long *plocaladdr)
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{
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int rval=vmeUniverseXlateAddr(1,0,am,vmeaddr,plocaladdr);
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*plocaladdr+=PCI_MEM_BASE;
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return rval;
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}
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/* how a CPU address is mapped to the VME bus (if at all) */
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int
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BSP_local2vme_adrs(unsigned long am, unsigned long localaddr, unsigned long *pvmeaddr)
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{
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return vmeUniverseXlateAddr(0, 0, am,localaddr+PCI_DRAM_OFFSET,pvmeaddr);
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}
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int BSP_installVME_isr(unsigned long vector, BSP_VME_ISR_t handler, void *arg)
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{
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return(vmeUniverseInstallISR(vector, handler, arg));
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}
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int
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BSP_removeVME_isr(unsigned long vector, BSP_VME_ISR_t handler, void *arg)
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{
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return(vmeUniverseRemoveISR(vector, handler, arg));
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}
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/* retrieve the currently installed ISR for a given vector */
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BSP_VME_ISR_t BSP_getVME_isr(unsigned long vector, void **parg)
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{
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return(vmeUniverseISRGet(vector, parg));
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}
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int BSP_enableVME_int_lvl(unsigned int level)
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{
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return(vmeUniverseIntEnable(level));
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}
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int BSP_disableVME_int_lvl(unsigned int level)
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{
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return(vmeUniverseIntDisable(level));
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}
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void
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__BSP_default_vme_config(void)
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{
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vmeUniverseInit();
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vmeUniverseReset();
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/* setup a PCI0 area to map the VME bus */
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setdbat(0,_VME_A32_WIN0_ON_PCI, _VME_A32_WIN0_ON_PCI, 0x10000000, IO_PAGE);
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/* map VME address ranges */
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vmeUniverseMasterPortCfg(
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0,
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VME_AM_EXT_SUP_DATA,
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_VME_A32_WIN0_ON_VME,
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_VME_A32_WIN0_ON_PCI,
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0x0F000000);
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vmeUniverseMasterPortCfg(
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1,
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VME_AM_STD_SUP_DATA,
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0x00000000,
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_VME_A24_ON_PCI,
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0x00ff0000);
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vmeUniverseMasterPortCfg(
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2,
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VME_AM_SUP_SHORT_IO,
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0x00000000,
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_VME_A16_ON_PCI,
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0x00010000);
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#ifdef _VME_DRAM_OFFSET
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/* map our memory to VME */
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vmeUniverseSlavePortCfg(
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0,
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VME_AM_EXT_SUP_DATA| VME_AM_IS_MEMORY,
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_VME_DRAM_OFFSET,
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PCI_DRAM_OFFSET,
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BSP_mem_size);
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/* make sure the host bridge PCI master is enabled */
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vmeUniverseWriteReg(
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vmeUniverseReadReg(UNIV_REGOFF_PCI_CSR) | UNIV_PCI_CSR_BM,
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UNIV_REGOFF_PCI_CSR);
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#endif
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/* stdio is not yet initialized; the driver will revert to printk */
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vmeUniverseMasterPortsShow(0);
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vmeUniverseSlavePortsShow(0);
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/* install the VME insterrupt manager */
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vmeUniverseInstallIrqMgrAlt(1,
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0, BSP_GPP_IRQ_LOWEST_OFFSET + 12,
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1, BSP_GPP_IRQ_LOWEST_OFFSET + 13,
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2, BSP_GPP_IRQ_LOWEST_OFFSET + 14,
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3, BSP_GPP_IRQ_LOWEST_OFFSET + 15,
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-1);
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}
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