forked from Imagelibrary/rtems
7a01a888a7
The drivers are updated to use the new AMBA layer, however the backwards-compatibility interface (ambapp_old) is used. Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
101 lines
2.4 KiB
C
101 lines
2.4 KiB
C
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#include <rasta.h>
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/* PCI frequency */
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#define SYS_FREQ_HZ 30000000
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/*#define USE_AT697_RAM 1 */
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/* memarea_to_hw(x)
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*
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* x: address in AT697 address space
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*
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* returns the address in the RASTA address space that can be used to access x with dma.
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*
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*/
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#ifdef USE_AT697_RAM
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static inline unsigned int memarea_to_hw(unsigned int addr) {
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return ((addr & 0x0fffffff) | RASTA_PCI_BASE);
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}
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#else
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static inline unsigned int memarea_to_hw(unsigned int addr) {
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return ((addr & 0x0fffffff) | RASTA_LOCAL_SRAM);
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}
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#endif
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#define MEMAREA_TO_HW(x) memarea_to_hw(x)
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#define IRQ_CLEAR_PENDING(irqno)
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#define IRQ_UNMASK(irqno)
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#define IRQ_MASK(irqno)
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#define IRQ_GLOBAL_PREPARE(level) rtems_interrupt_level level
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#define IRQ_GLOBAL_DISABLE(level) rtems_interrupt_disable(level)
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#define IRQ_GLOBAL_ENABLE(level) rtems_interrupt_enable(level)
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#define GRCAN_REG_INT(handler,irqno,arg) \
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if ( grcan_rasta_int_reg ) \
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grcan_rasta_int_reg(handler,irqno,arg);
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void (*grcan_rasta_int_reg)(void *handler, int irq, void *arg) = 0;
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#define GRCAN_PREFIX(name) grcan_rasta##name
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/* We provide our own handler */
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#define GRCAN_DONT_DECLARE_IRQ_HANDLER
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#define GRCAN_REG_BYPASS_CACHE
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#define GRCAN_DMA_BYPASS_CACHE
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#define GRCAN_MAX_CORES 1
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/* Custom Statically allocated memory */
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#undef STATICALLY_ALLOCATED_TX_BUFFER
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#undef STATICALLY_ALLOCATED_RX_BUFFER
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#define STATIC_TX_BUF_SIZE 4096
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#define STATIC_RX_BUF_SIZE 4096
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#define TX_BUF_SIZE 4096
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#define RX_BUF_SIZE 4096
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#define STATIC_TX_BUF_ADDR(core) \
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((unsigned int *)\
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(grcan_rasta_rambase+(core)*(STATIC_TX_BUF_SIZE+STATIC_RX_BUF_SIZE)))
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#define STATIC_RX_BUF_ADDR(core) \
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((unsigned int *) \
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(grcan_rasta_rambase+(core)*(STATIC_TX_BUF_SIZE+STATIC_RX_BUF_SIZE)+STATIC_RX_BUF_SIZE))
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#define GRCAN_DEVNAME "/dev/grcan0"
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#define GRCAN_DEVNAME_NO(devstr,no) ((devstr)[10]='0'+(no))
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void grcan_rasta_interrupt_handler(int irq, void *pDev);
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unsigned int grcan_rasta_rambase;
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#include "grcan.c"
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int grcan_rasta_ram_register(struct ambapp_bus *abus, int rambase)
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{
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grcan_rasta_rambase = rambase;
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return GRCAN_PREFIX(_register)(abus);
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}
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#if 0
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static void grcan_rasta_interrupt_handler(int v)
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{
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/* We know there is always only one GRCAN core in a RASTA chip... */
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grcan_interrupt(&grcans[0]);
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/*
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struct grcan_priv *pDev = arg;
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grcan_interrupt(pDev);
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*/
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}
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#endif
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void GRCAN_PREFIX(_interrupt_handler)(int irq, void *pDev)
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{
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grcan_interrupt(pDev);
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}
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