forked from Imagelibrary/rtems
Remove parameters from ppc_exc_initialize() since all BSPs passed the same values. Update #3459.
174 lines
8.4 KiB
C
174 lines
8.4 KiB
C
/*===============================================================*\
|
|
| Project: RTEMS generic MPC5200 BSP |
|
|
+-----------------------------------------------------------------+
|
|
| Partially based on the code references which are named below. |
|
|
| Adaptions, modifications, enhancements and any recent parts of |
|
|
| the code are: |
|
|
| Copyright (c) 2005 |
|
|
| Embedded Brains GmbH |
|
|
| Obere Lagerstr. 30 |
|
|
| D-82178 Puchheim |
|
|
| Germany |
|
|
| rtems@embedded-brains.de |
|
|
+-----------------------------------------------------------------+
|
|
| The license and distribution terms for this file may be |
|
|
| found in the file LICENSE in this distribution or at |
|
|
| |
|
|
| http://www.rtems.org/license/LICENSE. |
|
|
| |
|
|
+-----------------------------------------------------------------+
|
|
| this file contains the BSP initialization code |
|
|
\*===============================================================*/
|
|
/***********************************************************************/
|
|
/* */
|
|
/* Module: bspstart.c */
|
|
/* Date: 07/17/2003 */
|
|
/* Purpose: RTEMS MPC5x00 C level startup code */
|
|
/* */
|
|
/*---------------------------------------------------------------------*/
|
|
/* */
|
|
/* Description: This routine starts the application. It includes */
|
|
/* application, board, and monitor specific */
|
|
/* initialization and configuration. The generic CPU */
|
|
/* dependent initialization has been performed before */
|
|
/* this routine is invoked. */
|
|
/* */
|
|
/*---------------------------------------------------------------------*/
|
|
/* */
|
|
/* Code */
|
|
/* References: MPC8260ads C level startup code */
|
|
/* Module: bspstart.c */
|
|
/* Project: RTEMS 4.6.0pre1 / MCF8260ads BSP */
|
|
/* Version 1.2 */
|
|
/* Date: 04/17/2002 */
|
|
/* */
|
|
/* Author(s) / Copyright(s): */
|
|
/* */
|
|
/* The MPC860 specific stuff was written by Jay Monkman */
|
|
/* (jmonkman@frasca.com) */
|
|
/* */
|
|
/* Modified for the MPC8260ADS board by Andy Dachs */
|
|
/* <a.dachs@sstl.co.uk> */
|
|
/* Surrey Satellite Technology Limited, 2001 */
|
|
/* A 40MHz system clock is assumed. */
|
|
/* The PON. RST.CONF. Dip switches (DS1) are */
|
|
/* 1 - Off */
|
|
/* 2 - On */
|
|
/* 3 - Off */
|
|
/* 4 - On */
|
|
/* 5 - Off */
|
|
/* 6 - Off */
|
|
/* 7 - Off */
|
|
/* 8 - Off */
|
|
/* Dip switches on DS2 and DS3 are all set to ON */
|
|
/* The LEDs on the board are used to signal panic and fatal_error */
|
|
/* conditions. */
|
|
/* The mmu is unused at this time. */
|
|
/* */
|
|
/* COPYRIGHT (c) 1989-2007. */
|
|
/* On-Line Applications Research Corporation (OAR). */
|
|
/* */
|
|
/* The license and distribution terms for this file may be */
|
|
/* found in the file LICENSE in this distribution or at */
|
|
/* http://www.rtems.org/license/LICENSE. */
|
|
/* */
|
|
/*---------------------------------------------------------------------*/
|
|
/* */
|
|
/* Partially based on the code references which are named above. */
|
|
/* Adaptions, modifications, enhancements and any recent parts of */
|
|
/* the code are under the right of */
|
|
/* */
|
|
/* IPR Engineering, Dachauer Straße 38, D-80335 München */
|
|
/* Copyright(C) 2003 */
|
|
/* */
|
|
/*---------------------------------------------------------------------*/
|
|
/* */
|
|
/* IPR Engineering makes no representation or warranties with */
|
|
/* respect to the performance of this computer program, and */
|
|
/* specifically disclaims any responsibility for any damages, */
|
|
/* special or consequential, connected with the use of this program. */
|
|
/* */
|
|
/*---------------------------------------------------------------------*/
|
|
/* */
|
|
/* Version history: 1.0 */
|
|
/* */
|
|
/***********************************************************************/
|
|
|
|
#include <rtems.h>
|
|
#include <rtems/counter.h>
|
|
|
|
#include <libcpu/powerpc-utility.h>
|
|
|
|
#include <bsp.h>
|
|
#include <bsp/vectors.h>
|
|
#include <bsp/bootcard.h>
|
|
#include <bsp/irq.h>
|
|
#include <bsp/irq-generic.h>
|
|
#include <bsp/mpc5200.h>
|
|
|
|
/* Configuration parameter for clock driver */
|
|
uint32_t bsp_time_base_frequency;
|
|
|
|
/* Legacy */
|
|
uint32_t bsp_clicks_per_usec;
|
|
|
|
uint32_t _CPU_Counter_frequency(void)
|
|
{
|
|
return bsp_time_base_frequency;
|
|
}
|
|
|
|
void bsp_start(void)
|
|
{
|
|
/*
|
|
* Get CPU identification dynamically. Note that the get_ppc_cpu_type()
|
|
* function store the result in global variables so that it can be used
|
|
* later...
|
|
*/
|
|
get_ppc_cpu_type();
|
|
get_ppc_cpu_revision();
|
|
|
|
#if defined(HAS_UBOOT) && defined(SHOW_MORE_INIT_SETTINGS)
|
|
{
|
|
void dumpUBootBDInfo( bd_t * );
|
|
dumpUBootBDInfo( &bsp_uboot_board_info );
|
|
}
|
|
#endif
|
|
|
|
cpu_init();
|
|
|
|
if(get_ppc_cpu_revision() >= 0x2014) {
|
|
/* Special settings for MPC5200B (B variant) */
|
|
uint32_t xlb_cfg = mpc5200.config;
|
|
|
|
/* XXX: The Freescale documentation for BSDIS seems to be wrong */
|
|
xlb_cfg |= XLB_CFG_BSDIS;
|
|
|
|
xlb_cfg &= ~XLB_CFG_PLDIS;
|
|
|
|
mpc5200.config = xlb_cfg;
|
|
}
|
|
|
|
bsp_time_base_frequency = XLB_CLOCK / 4;
|
|
bsp_clicks_per_usec = (XLB_CLOCK/4000000);
|
|
|
|
/* Initialize exception handler */
|
|
ppc_exc_cache_wb_check = 0;
|
|
ppc_exc_initialize();
|
|
ppc_exc_set_handler(ASM_ALIGN_VECTOR, ppc_exc_alignment_handler);
|
|
|
|
/* Initialize interrupt support */
|
|
bsp_interrupt_initialize();
|
|
|
|
/*
|
|
* If the BSP was built with IRQ benchmarking enabled,
|
|
* then intialize it.
|
|
*/
|
|
#if (BENCHMARK_IRQ_PROCESSING == 1)
|
|
BSP_IRQ_Benchmarking_Reset();
|
|
#endif
|
|
|
|
#ifdef SHOW_MORE_INIT_SETTINGS
|
|
printk("Exit from bspstart\n");
|
|
#endif
|
|
}
|