forked from Imagelibrary/rtems
708 lines
25 KiB
C
708 lines
25 KiB
C
/*
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* GR1553B BC driver, Descriptor LIST handling
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*
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* COPYRIGHT (c) 2010.
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* Cobham Gaisler AB.
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#ifndef __GR1553BC_LIST_H__
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#define __GR1553BC_LIST_H__
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/*!\file doc/gr1553bc_list.h
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* \brief GR1553B BC driver
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*
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* \section OVERVIEW
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*
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* The BC device driver can schedule synchronous and asynchronous lists
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* of descriptors. The list contains a descriptor table and a software
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* description to make some operations possible, for example translate
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* descriptor-address into descriptor-number.
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*
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* This is the LIST API. It provides functionality to create and manage
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* a BC descriptor list.
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*
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* A list is built up by the following build blocks:
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* - Major Frame (Consists of N Minor Frames)
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* - Minor Frame (Consists of up to 32 1553 Message Slots)
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* - Message Slot (Transfer/Condition BC descriptor)
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*
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* The user can configure lists with different configuration of number of
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* Major Frames, Minor Frame and messages slots within a Minor Frame. The
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* List manages a strait descriptor table (may be changed) and a Frame/Slot
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* tree in order to easily find it's way through all descriptor created.
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*
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* Each Minor frame consist of up to 32 message slot and 2 message slots
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* for time management and descriptor find operations. The list can manage
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* time slots per minor frame, for example a minor frame may be programmed
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* to take 8ms and when the user allocate a message slot within that Minor
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* frame the time spcified will be subtracted from the 8ms, and when the
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* message slot is freed the time will be returned to the Minor frame again.
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*
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* A Major, Minor and Message Slots are identified using a MID (Message-ID).
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* The MID is a way for the user to avoid using pointers are talk with the
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* list API in an easier way. For example a condition Slot that should jump
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* to a transfer slot can be created by knowing "MID and Jump-To-MID". When
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* allocating a Slot (with or without time) the user may specify a certain
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* Slot or a Minor frame, when a Minor frame is given then the API will find
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* a free Slot as early in the Minor Frame as possible and return it to the
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* user.
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*
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* A MID can be created using the macros:
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* GR1553BC_ID(major,minor,slot) - ID of a SLOT
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* GR1553BC_MINOR_ID(major,minor) - ID of a MINOR (Slot=0xff)
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* GR1553BC_MAJOR_ID(major) - ID of a Major (Minor=0xff,Slot=0xff)
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*
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* The typical approach create lists is in the following order:
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* -# gr1553bc_list_alloc(&list, MAJOR_CNT)
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* -# gr1553bc_list_config(list, &listcfg)
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* -# Create all Major Frames and Minor frame, for each major frame:
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* a) gr1553bc_major_alloc_skel(&major, &major_minor_cfg)
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* b) gr1553bc_list_set_major(list, &major, MAJOR_NUM)
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* -# link end Major Frames together:
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* a) gr1553bc_list_set_major(&major7, &major0) // Connect Major frames
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* -# gr1553bc_list_table_alloc() (Allocate Descriptor Table)
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* -# gr1553bc_list_table_build() (Build Descriptor Table from Majors/Minors)
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* -# Allocate and initialize Descriptors pre defined before starting:
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* -## gr1553bc_slot_alloc(list, &MID, TIME_REQUIRED, ..)
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* -## gr1553bc_slot_transfer(MID, ...)
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* -# START BC HARDWARE BY SHCDULING ABOVE LIST
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* -# Operate on List
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*
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*
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* \section bc_list_update Changing a scheduled BC list (during BC-runtime)
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*
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* One can use the INDICATION service to avoid modifying
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* a descriptor currently in use by the BC core. One can also in most cases
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* do descriptor initialization in three steps: Init Descriptor as Dummy
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* with and allocated time (often done before starting/scheduling list),
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* then modify transfer options and data-pointers, then clear the Dummy
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* bit in one atomic data store. This approach will avoid potential races
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* between software has hardware.
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*
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*
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* \section bc_memory_setup Custom Memory Setup
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*
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* For designs where dynamically memory is not an option, or the driver
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* is used on a AMBA-over-PCI bus (where malloc() does not work), the
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* API allows the user to provide custom addresses for descriptor table
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* and object descriptions (lists, major frames, minor frames). Custom
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* descriptor table is probably the most interesting thing for most, it
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* is setup with gr1553bc_list_table_alloc(list, CUSTOM_ADDRESS).
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*
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* Object descriptions are normally allocated during initialization
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* procedure by providing the API with a object configuration, for
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* example a Major Frame configuration enables the API to allocate
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* the software description of a Major Frame with all it's Minor frames.
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*
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*
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* \section major Major Frame
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*
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* Consists of multiple Minor frames. A Major frame may be connected/linked
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* with another Major frame, this will result in a Jump Slot from last
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* Minor frame in the first Major to the first Minor in the second Major.
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*
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*
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* \section minor Minor Frame
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*
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* Consists of up to 32 Message Slots. The services are Time-Management and
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* Slot allocation.
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*
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* Time-Management is optional.
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*
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* Time-Slot-Management can be enabled per Minor frame. A Minor frame can be
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* assigned a time in microseconds. The BC will not continue to the next
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* Minor frame until the time has passed. It is managed by adding an extra
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* Dummy Message Slot with the total minor frame time. Each time a message
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* Slot is allocated (with a certain time: Slot-Time) the Slot-Time will
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* be decremented from the total time of the Minor frame. This way the
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* sum of the Message Slot will always sum up to the total time of the
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* Minor configuration. When a message slot is freed, the Dymmy Message
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* Slot's Slot-Time is incremented with the freed Slot-Time.
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*
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* A Message Slot can be allocated by identifying a specific free Slot
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* by the MID (Message-ID) or by letting the API allocate the first free
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* Slot in the Minor Frame (Set MID Slot-ID to 0xff to identify Minor
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* Frame).
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*
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*
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* \section slot Message Slot
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*
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* The GR1553B BC core supports two Slot (Descriptor) Types:
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* - Transfer descriptor
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* - Condition descriptor (Jump, unconditional-IRQ)
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*
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* See the hardware manual for a detail description of a descriptor (Slot).
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*
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* The BC Core is unaware of lists, it steps through executing each
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* descriptor as the encountered, Conditionals resulting in jumps may
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* let us to create more complex arrangements of buffer descriptos (BDs)
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* which we call list.
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*
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* Transfer BDs (TBDs) may have a time slot assigned, the BC core will wait
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* until the time has expired before executing the next descriptor. Time
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* slots are handled by a Minor frame in the list.
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*
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* A Message Slot is allocated using the gr1553bc_slot_alloc() function,
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* and configured by calling one of the below functions:
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* - gr1553bc_slot_irq_prepare [unconditional IRQ slot]
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* - gr1553bc_slot_jump [unconditional jump]
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* - gr1553bc_slot_exttrig [Dummy transfer, wait for EXTERNAL-TRIGGER]
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* - gr1553bc_slot_transfer [Transfer descriptor]
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* - gr1553bc_slot_empty [Create Dummy Transfer descriptor]
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* - gr1553bc_slot_raw [Custom Descriptor handling]
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*
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* - gr1553bc_slot_dummy [Set existing Transfer descriptor to Dummy]
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* - gr1553bc_slot_update [Update DataPointer|Status of a TBD]
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*
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*
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* \section bc_IRQ Interrupt Handling
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*
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* There are different types of interrupts, Error IRQs or transfer IRQs. The
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* Error IRQs are handled by the driver can a callback function is called.
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*
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* Transfer Descriptors can be programmed to generate interrupt, and
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* condition descriptors can be programmed to generate interrupt
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* unconditionaly (there exists more conditional types). When a Transfer
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* descriptor causes IRQ the general ISR callback of the BC driver is
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* called to let the user handle the interrupt. When a condition descriptor
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* causes an IRQ a custom IRQ handler is called (if assigned).
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*
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* Transfers descriptor IRQ is enabled by configuring the descriptor.
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*
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* The API provides functions for placing unconditional IRQ points anywhere
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* in the list. The order:
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* -# gr1553bc_slot_alloc(&MID, TIME=0, ..)
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* -# gr1553bc_slot_irq_prepare(MID, funcISR, data)
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* -# gr1553bc_slot_irq_enable(MID)
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*
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* \verbatim
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* void funcISR(*bd, *data)
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* {
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* // HANDLE ONE OR MULTIPLE DESCRIPTORS (MULTIPLE IN THIS EXAMPLE):
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* int MID;
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* gr1553bc_mid_from_bd(bd,&MID,NULL);
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* printf("IRQ ON %06x\n", MID);
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* }
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* \endverbatim
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*
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* \ingroup GR1553BC
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*/
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#include <stdint.h>
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#include "gr1553bc.h"
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/**** CONFIGURATION OPTIONS ****/
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/* Define GR1553BC_TIMESLOT to make driver take care of time
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* management of minor frames.
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*/
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#define GR1553BC_TIMESLOT
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#define GR1553BC_MINOR_MAX 256
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#define GR1553BC_SLOT_MAX 32
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#ifdef __cplusplus
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extern "C" {
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#endif
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struct gr1553bc_list;
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struct gr1553bc_major;
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struct gr1553bc_minor;
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struct gr1553bc_minor_cfg;
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struct gr1553bc_major_cfg;
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struct gr1553bc_minor_cfg {
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int slot_cnt;
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int timeslot; /* Total time of minor frame in us */
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};
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struct gr1553bc_major_cfg {
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int minor_cnt; /* Number of Minor Frames */
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struct gr1553bc_minor_cfg minor_cfgs[1];
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};
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struct gr1553bc_list_cfg {
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unsigned char rt_timeout[31]; /* Number of us timeout tolerance per RT */
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unsigned char bc_timeout; /* Number of us timeout tolerance of
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* broadcast transfers */
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int tropt_irq_on_err; /* Generate IRQ on transfer error */
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int tropt_pause_on_err; /* Pause list on transfer error */
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int async_list; /* Set to non-zero if asyncronous list*/
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};
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/* Default Configuration */
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extern struct gr1553bc_list_cfg gr1553bc_def_cfg;
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/* Complete list of all major frames */
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struct gr1553bc_list {
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void *_table_custom; /* Config option given by user */
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void *_table; /* address of allocated bd-table */
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unsigned int table_hw; /* Descriptor table base HW-ADR */
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unsigned int table_cpu; /* Descriptor table base CPU-ADR */
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int table_size; /* Descriptor Table Size */
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void *bc; /* BC HW, needed for adr translation */
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unsigned char rt_timeout[32]; /* Tolerance per RT, default 20us
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* Note: 31 is for Broadcast */
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uint32_t tropts; /* Transfer descriptor options:
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* On transfer error the following bits
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* do affect:
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* - bit28 1=Generate IRQ
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* - bit26 1=Pause transfer list
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*
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*/
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int async_list; /* async list or not */
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int major_cnt; /* Number of Major frames */
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struct gr1553bc_major *majors[1]; /* Var-Array of Major Pointers*/
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};
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/* Alloc a List with a maximum number of Major frames supported */
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extern int gr1553bc_list_alloc(struct gr1553bc_list **list, int max_major);
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/* Free List if allocated with gr1553bc_list_alloc() */
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extern void gr1553bc_list_free(struct gr1553bc_list *list);
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/* Configure Global List parameters
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*
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* \param list List to be configured and initialized.
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* \param cfg List Configuration
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* \param bc The BC hardware device description
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* (only needed for address translation)
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*/
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extern int gr1553bc_list_config
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(
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struct gr1553bc_list *list,
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struct gr1553bc_list_cfg *cfg,
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void *bc
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);
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/* Link a 'major' Major frame with next major frame
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* The links affected:
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* - major->next
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* - major->minor[LAST]->next
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*/
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extern void gr1553bc_list_link_major(
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struct gr1553bc_major *major,
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struct gr1553bc_major *next
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);
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/* Link in a Major frame into a BC list.
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* Calls gr1553bc_list_link_major() to link major frame with major-1 and
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* major+1. If ending or starting major frame the frame is wrapped around.
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*/
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extern int gr1553bc_list_set_major(
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struct gr1553bc_list *list,
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struct gr1553bc_major *major,
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int no);
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/* Calculate the size required in the descriptor table by one minor frame. */
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extern int gr1553bc_minor_table_size(struct gr1553bc_minor *minor);
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/* Calculate the size required for the descriptor table.
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*/
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extern int gr1553bc_list_table_size(struct gr1553bc_list *list);
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/* Allocate an empty descriptor table from list description suitable for
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* the BC given by 'bc'.
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*
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* \param bdtab_custom Custom Descriptor Allocation options:
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* ZERO: Dynamically allocated by Driver (CPU near RAM)
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* Non-Zero: Use provided address as BASE of BD-TABLE
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* Non-Zero with LSB set: Same as Non-Zero but address
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* is given as HW address (used with AMBA-over-PCI to
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* to specify RAM location on PCI board).
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*/
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extern int gr1553bc_list_table_alloc
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(
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struct gr1553bc_list *list,
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void *bdtab_custom
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);
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/* Free descriptor table allocated with gr1553bc_list_table_alloc() */
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extern void gr1553bc_list_table_free(struct gr1553bc_list *list);
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/* Build an empty descriptor table from list description,
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* the minor frames will be linked together.
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*/
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extern int gr1553bc_list_table_build(struct gr1553bc_list *list);
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/* Major Frame */
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struct gr1553bc_major {
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struct gr1553bc_major *next; /* Next Major Frame */
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struct gr1553bc_major_cfg *cfg; /* User Config of Major frame */
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struct gr1553bc_minor *minors[1]; /* Minor frames */
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};
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/* Minor Frame */
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struct gr1553bc_minor {
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struct gr1553bc_minor *next; /* Next Minor Frame */
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struct gr1553bc_minor_cfg *cfg; /* User Config of Minor frame */
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uint32_t alloc; /* Descripts allocated */
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/* Note: THIS POINTER MUST BE ALIGNED ON A 128-bit BOUNDARY */
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union gr1553bc_bd *bds; /* Descriptors for this minor frame (CPU ADRS)*/
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};
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/* Alloc a Major/Minor frame skeleton according to the configuration structure.
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* The descriptor table is not allocated.
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*/
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extern int gr1553bc_major_alloc_skel
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(
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struct gr1553bc_major **major,
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struct gr1553bc_major_cfg *cfg
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);
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/* Unique Message/Descriptor ID. Can be used to identify a Major or Minor
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* Frame, or a Slot.
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*
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* - If minor_num is 0xff, the ID identifies a Major Frame
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* - If slot_num is 0xff, the ID identifies a Minor Frame
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* - If non of the above is true, the ID identifies a specific Slot
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*/
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#define GR1553BC_ID(major_num, minor_num, slot_num) \
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((((major_num)<<16)&0xff0000) | (((minor_num)<<8)&0xff00) | \
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((slot_num) & 0xff))
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#define GR1553BC_MINOR_ID(major_num, minor_num) \
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GR1553BC_ID(major_num, minor_num, 0xff)
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#define GR1553BC_MAJOR_ID(major_num) \
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GR1553BC_ID(major_num, 0xff, 0xff)
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#define GR1553BC_MAJID_FROM_ID(mid) (((mid) >> 16) & 0xff)
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#define GR1553BC_MINID_FROM_ID(mid) (((mid) >> 8) & 0xff)
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#define GR1553BC_SLOTID_FROM_ID(mid) ((mid) & 0xff)
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#define GR1553BC_ID_SET_SLOT(mid, slot_num) (((mid) & ~0xff) | ((slot_num) & 0xff))
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extern struct gr1553bc_major *gr1553bc_major_from_id
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(
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struct gr1553bc_list *list,
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int mid
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);
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extern struct gr1553bc_minor *gr1553bc_minor_from_id
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(
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struct gr1553bc_list *list,
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int mid
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);
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/* Get free time left of minor frame identified by MID 'mid' */
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extern int gr1553bc_list_freetime(struct gr1553bc_list *list, int mid);
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/* Get free time left of minor frame */
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extern int gr1553bc_minor_freetime(struct gr1553bc_minor *minor);
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/* Allocate a time slot on a minor frame, major/minor frame is identified
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* by MID. The 'mid' is a input/ouput parameter, the resulting slot taken
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* will be placed in 'mid', a pointer to the allocated descriptor is stored
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* into bd.
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*
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* Major/Minor must be specified by MID, if slot is specified that slot will
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* be allocated, if slot is 0xff, then the first free slot is allocated.
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*
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* The function fails (return negative) if timeslot is longer than remaining
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* time in minor frame, if no more slots are available in minor frame, if
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* MID points to a bad major/minor or major/minor/slot.
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*/
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extern int gr1553bc_slot_alloc(
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struct gr1553bc_list *list,
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int *mid,
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int timeslot,
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union gr1553bc_bd **bd
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);
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/* Same as gr1553bc_slot_alloc but identifies a minor instead of list.
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* The major/minor part of MID is ignored.
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*/
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extern int gr1553bc_slot_alloc2(
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struct gr1553bc_minor *minor,
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int *mid,
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int timeslot,
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union gr1553bc_bd **bd
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);
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/* Free message slot and the time associated with it. The time taken by the
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* message slot is added to the END TIME descriptor, if managed by the driver
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* for this minor frame. The descriptor will be
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*/
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extern int gr1553bc_slot_free(struct gr1553bc_list *list, int mid);
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extern int gr1553bc_slot_free2(struct gr1553bc_minor *minor, int mid);
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/* Find MID from Descriptor pointer
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*
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* In the end of each minor frame is a unconditional jump
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* to next minor frame descriptor. The hardware does not
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* use the last 8 bytes of conditional descriptors, in the
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* padding area a MID is stored so that we can lookup the
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* MID of a descriptor. This function finds the jump
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* descriptor and subtracs the offset from it.
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*
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* A faster way of looking up can be implemented if the
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* list is symertical, however in the current setup we
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* allow different numbers of slots in minor frames, and
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* different number of minor frames in a major frame.
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*
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* \param bd IN: Descriptor to lookup MID of (CPU address of BD)
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* \param mid OUT: Pointer to where Message-ID (Slot-ID) will be stored
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* \param async OUT: Function will store non-zero value if BD belogs to
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* async list.
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*/
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extern int gr1553bc_mid_from_bd(
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union gr1553bc_bd *bd,
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int *mid,
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int *async
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);
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/********** TRANSFER DESCRIPTOR MANIPULATION **********/
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/* Get pointer to descriptor entry from MID. */
|
|
extern union gr1553bc_bd *gr1553bc_slot_bd
|
|
(
|
|
struct gr1553bc_list *list,
|
|
int mid
|
|
);
|
|
|
|
/* IRQ function */
|
|
typedef void (*bcirq_func_t)(union gr1553bc_bd *bd, void *data);
|
|
|
|
/* Create unconditional IRQ customly defined location.
|
|
* The IRQ is disabled, enable it with gr1553bc_slot_irq_enable().
|
|
*/
|
|
extern int gr1553bc_slot_irq_prepare
|
|
(
|
|
struct gr1553bc_list *list,
|
|
int mid,
|
|
bcirq_func_t func,
|
|
void *data
|
|
);
|
|
|
|
/* Enable previously prepared unconditional IRQ */
|
|
extern int gr1553bc_slot_irq_enable(struct gr1553bc_list *list, int mid);
|
|
|
|
/* Disable unconditional IRQ point, changed to unconditional JUMP
|
|
* to descriptor following.
|
|
* After disabling it it can be enabled again, or freed.
|
|
*/
|
|
extern int gr1553bc_slot_irq_disable(struct gr1553bc_list *list, int mid);
|
|
|
|
/* Create custom jump to descriptor, conditional or unconditional, see
|
|
* hardware manual for conditions.
|
|
*
|
|
* set conditional to GR1553BC_UNCOND_JMP for unconditional jump.
|
|
*/
|
|
extern int gr1553bc_slot_jump
|
|
(
|
|
struct gr1553bc_list *list,
|
|
int mid,
|
|
uint32_t condition,
|
|
int to_mid
|
|
);
|
|
|
|
/* Create a dummy transfer, paused until external trigger is set. The
|
|
* Slot is will have the dummy bit set, no transfer will take place.
|
|
*/
|
|
extern int gr1553bc_slot_exttrig(struct gr1553bc_list *list, int mid);
|
|
|
|
/* Create a transfer on a previous allocated descriptor. It is assumed
|
|
* that the descriptor has been initialized empty before calling this
|
|
* function, this is to avoid races.
|
|
*
|
|
* The settings that are controlled on a global level (and not
|
|
* by this function):
|
|
* - IRQ after transfer error
|
|
* - IRQ after transfer (not supported, insert separate IRQ slot after this)
|
|
* - Pause schedule after transfer error
|
|
* - Pause schedule after transfer (not supported)
|
|
* - slot time optional (set when MID allocated), otherwise 0
|
|
* - (OPTIONAL) Dummy Bit, set using slot_empty() or ..._TT_DUMMY
|
|
* - RT timeout tolerance (managed per RT)
|
|
*
|
|
* Input Parameters:
|
|
* - Retry Mode (options)
|
|
* - Number of retires (options)
|
|
* - Bus selection (A or B) (options)
|
|
* - dummy bit (options)
|
|
* - transfer type (tt)
|
|
* - rt src/dst address (tt)
|
|
* - RT subaddress (tt)
|
|
* - word count (tt)
|
|
* - mode code (tt)
|
|
* - data pointer (dptr)
|
|
*
|
|
*
|
|
* See macros defined in this header file for creating transfer types (tt)
|
|
* and word count etc.
|
|
*
|
|
* See macros defined in this header file for creating the mask of options.
|
|
*
|
|
* Note that if bit0 (LSB) of dptr is set, then the address is translated into
|
|
* hardware address, otherwise the dptr is assumed to be accessible from the
|
|
* 1553 core. This is an option only for AMBA-over-PCI.
|
|
*/
|
|
extern int gr1553bc_slot_transfer(
|
|
struct gr1553bc_list *list,
|
|
int mid,
|
|
int options,
|
|
int tt,
|
|
uint16_t *dptr);
|
|
|
|
/* Remove or set dummy bit of a transfer descriptor
|
|
* Bit31 of *dummy is written to the dummy bit, the
|
|
* old descriptor value is stored into *dummy.
|
|
*/
|
|
extern int gr1553bc_slot_dummy(
|
|
struct gr1553bc_list *list,
|
|
int mid,
|
|
unsigned int *dummy);
|
|
|
|
/* Make a slot empty (BC will not generate bus transfers), time slot
|
|
* allocated is untouched (if assigned).
|
|
*/
|
|
extern int gr1553bc_slot_empty(struct gr1553bc_list *list, int mid);
|
|
|
|
/* Transfer descriptor status and/or update Transfer descriptor data pointer.
|
|
*
|
|
* Read and/or write Status of a slot. Writing the status word may be
|
|
* used by software to indicate that result has been handled, or bit 31
|
|
* may be written 1 telling software that when it reaches 0, then BC
|
|
* has executed the request.
|
|
*
|
|
* Operation:
|
|
* bd->status = *stat & (bd->status 0xffffff) | (*stat & 0x80000000);
|
|
* *stat = Value of bd->status before rewrite.
|
|
*
|
|
* Note that the status word is not written when *stat is zero.
|
|
*
|
|
* Note that if bit0 (LSB) of dptr is set, then the address is translated into
|
|
* hardware address, otherwise the dptr is assumed to be accessible from the
|
|
* 1553 core. This is an option only for AMBA-over-PCI.
|
|
*/
|
|
extern int gr1553bc_slot_update(
|
|
struct gr1553bc_list *list,
|
|
int mid,
|
|
uint16_t *dptr,
|
|
unsigned int *stat);
|
|
|
|
/* Modify a transfer descriptor in any way,
|
|
*
|
|
* flags:
|
|
* bit[N=0..3]: 1 = set BD wordN according to argument wordN,
|
|
* 0 = do not modify BD wordN
|
|
*/
|
|
extern int gr1553bc_slot_raw
|
|
(
|
|
struct gr1553bc_list *list,
|
|
int mid,
|
|
unsigned int flags,
|
|
uint32_t word0,
|
|
uint32_t word1,
|
|
uint32_t word2,
|
|
uint32_t word3
|
|
);
|
|
|
|
|
|
/***** Macros to create BC Transfer Types (tt) for gr1553bc_slot_transfer() *****/
|
|
|
|
/* WRITE TO RT (BC-to-RT) */
|
|
#define GR1553BC_BC2RT(rtadr, subadr, word_count) \
|
|
((rtadr<<11) | (subadr<<5) | (0x1f<<21) | (0<<10) | \
|
|
((word_count>=32) ? 0 : word_count))
|
|
|
|
/* READ FROM RT (RT-to-BC) */
|
|
#define GR1553BC_RT2BC(rtadr, subadr, word_count) \
|
|
((rtadr<<11) | (subadr<<5) | (0x1f<<21) | (1<<10) | \
|
|
((word_count>=32) ? 0 : word_count))
|
|
|
|
/* RT(TX) WRITE TO RT(RX) (RT-to-RT) */
|
|
#define GR1553BC_RT2RT(tx_rtadr, tx_subadr, rx_rtadr, rx_subadr, word_count) \
|
|
((rx_rtadr<<11) | (rx_subadr<<5) | \
|
|
(tx_rtadr<<21) | (tx_subadr<<16) | \
|
|
(0<<10) | \
|
|
((word_count>=32) ? 0 : word_count))
|
|
|
|
/* Mode command without data. (BC-to-RT)
|
|
* Mode code: 0,1,2,3,4,5,6,7 or 8.
|
|
*/
|
|
#define GR1553BC_MC_NODATA(rtadr, modecode) \
|
|
((rtadr<<11) | (0x1f<<5) | (0x1f<<21) | \
|
|
(modecode<<0) | (1<<10))
|
|
|
|
/* Mode command with 4 byte data (RT-to-BC)
|
|
* Mode code: 16, 18 or 19.
|
|
*/
|
|
#define GR1553BC_MC_RT2BC(rtadr, modecode) \
|
|
((rtadr<<11) | (0x1f<<5) | (0x1f<<21) | \
|
|
(modecode<<0) | (1<<10))
|
|
|
|
/* Mode command with 4 byte data (BC-to-RT)
|
|
* Mode code: 17, 20 or 21.
|
|
*/
|
|
#define GR1553BC_MC_BC2RT(rtadr, modecode) \
|
|
((rtadr<<11) | (0x1f<<5) | (0x1f<<21) | \
|
|
(modecode<<0) | (0<<10))
|
|
|
|
/* Broadcast to all RTs, to a specific subaddress (BC-to-RTs) */
|
|
#define GR1553BC_BC_BC2RT(subadr, word_count) \
|
|
((0x1f<<11) | (subadr<<5) | (0x1f<<21) | \
|
|
(0<<10) | \
|
|
((word_count>=32) ? 0 : word_count))
|
|
|
|
/* Request RT to broadcast to all RTs, to a specific subaddress (RT-to-RTs) */
|
|
#define GR1553BC_BC_RT2RT(tx_rtadr, tx_subadr, rx_subadr, word_count) \
|
|
((0x1f<<11) | (rx_subadr<<5) | \
|
|
(tx_rtadr<<21) | (tx_subadr<<16) | \
|
|
(0<<10) | \
|
|
((word_count>=32) ? 0 : word_count))
|
|
|
|
/* Broadcast mode command without data (BC-to-RTs)
|
|
* Mode code: 1,3,4,5,6,7 or 8
|
|
*/
|
|
#define GR1553BC_BC_MC_NODATA(modecode) \
|
|
((0x1f<<11) | (0x1f<<5) | (0x1f<<21) | \
|
|
((modecode)<<0) | (1<<10))
|
|
|
|
/* Broadcast mode command with 4 byte data (BC-to-RTs)
|
|
* Mode code: 17, 20 or 21
|
|
*/
|
|
#define GR1553BC_BC_MC_BC2RT(modecode) \
|
|
((0x1f<<11) | (0x1f<<5) | (0x1f<<21) | \
|
|
((modecode)<<0) | (0<<10))
|
|
|
|
|
|
/***** Macros to create BC options (options) for gr1553bc_slot_transfer() *****/
|
|
|
|
/* Dummy (BC does no bus trasactions) */
|
|
#define GR1553BC_OPT_DUMMY (1<<1)
|
|
|
|
/* Retry modes */
|
|
#define GR1553BC_RETRY_SAME 0x0 /* Retry on the same bus only */
|
|
#define GR1553BC_RETRY_ALTER 0x1 /* Retry alternating on both busses */
|
|
#define GR1553BC_RETRY_ATTEMPT 0x2 /* Many attepts first on original
|
|
* bus then on other bus */
|
|
/* Number of retires supported */
|
|
#define GR1553BC_RETRY_CNT_MAX 6
|
|
|
|
/* Dummy bit: No transfer
|
|
* Bus bit: 0=A, 1=B
|
|
* Exttrig bit: Wait for external trigger (used for timesync)
|
|
* Exclusive bit: 1=Don't allow other messages in this time slot.
|
|
*/
|
|
#define GR1553BC_OPTIONS(dummy, exttrig, exclusive, retrymode, nretry, bus) \
|
|
((((exttrig) & 0x1) << 30) | (((exclusive) & 0x1) << 29) | \
|
|
((retrymode) << 23) | ((nretry) << 20) | \
|
|
((bus) & 1) | (((dummy) & 0x1) << 1))
|
|
|
|
#define GR1553BC_OPTIONS_BUSA GR1553BC_OPTIONS(0,0,0,GR1553BC_RETRY_SAME,0,0)
|
|
#define GR1553BC_OPTIONS_BUSB GR1553BC_OPTIONS(0,0,0,GR1553BC_RETRY_SAME,0,1)
|
|
#define GR1553BC_OPTIONS_BUSA_DUM GR1553BC_OPTIONS(1,0,0,GR1553BC_RETRY_SAME,0,0)
|
|
#define GR1553BC_OPTIONS_BUSB_DUM GR1553BC_OPTIONS(1,0,0,GR1553BC_RETRY_SAME,0,1)
|
|
|
|
/* Show parts of a list - this is for debugging only */
|
|
extern void gr1553bc_show_list(struct gr1553bc_list *list, int options);
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* __GR1553BC_LIST_H__ */
|