forked from Imagelibrary/rtems
569 lines
17 KiB
C
569 lines
17 KiB
C
/* SPDX-License-Identifier: BSD-2-Clause */
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/**
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* @file
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*
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* @ingroup RTEMSDeviceGRLIBMEMSCRUB
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*
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* @brief This header file defines the MEMSCRUB register block interface.
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*/
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/*
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* Copyright (C) 2021 embedded brains GmbH & Co. KG
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* This file is part of the RTEMS quality process and was automatically
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* generated. If you find something that needs to be fixed or
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* worded better please post a report or patch to an RTEMS mailing list
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* or raise a bug report:
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*
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* https://www.rtems.org/bugs.html
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*
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* For information on updating and regenerating please refer to the How-To
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* section in the Software Requirements Engineering chapter of the
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* RTEMS Software Engineering manual. The manual is provided as a part of
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* a release. For development sources please refer to the online
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* documentation at:
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*
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* https://docs.rtems.org
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*/
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/* Generated from spec:/dev/grlib/if/memscrub-header */
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#ifndef _GRLIB_MEMSCRUB_REGS_H
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#define _GRLIB_MEMSCRUB_REGS_H
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Generated from spec:/dev/grlib/if/memscrub */
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/**
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* @defgroup RTEMSDeviceGRLIBMEMSCRUB MEMSCRUB
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*
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* @ingroup RTEMSDeviceGRLIB
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*
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* @brief This group contains the MEMSCRUB interfaces.
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*
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* @{
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*/
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/**
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* @defgroup RTEMSDeviceGRLIBMEMSCRUBAHBS AHB Status register (AHBS)
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*
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* @brief This group contains register bit definitions.
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*
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* @{
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*/
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#define MEMSCRUB_AHBS_CECNT_SHIFT 22
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#define MEMSCRUB_AHBS_CECNT_MASK 0xffc00000U
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#define MEMSCRUB_AHBS_CECNT_GET( _reg ) \
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( ( ( _reg ) & MEMSCRUB_AHBS_CECNT_MASK ) >> \
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MEMSCRUB_AHBS_CECNT_SHIFT )
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#define MEMSCRUB_AHBS_CECNT_SET( _reg, _val ) \
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( ( ( _reg ) & ~MEMSCRUB_AHBS_CECNT_MASK ) | \
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( ( ( _val ) << MEMSCRUB_AHBS_CECNT_SHIFT ) & \
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MEMSCRUB_AHBS_CECNT_MASK ) )
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#define MEMSCRUB_AHBS_CECNT( _val ) \
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( ( ( _val ) << MEMSCRUB_AHBS_CECNT_SHIFT ) & \
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MEMSCRUB_AHBS_CECNT_MASK )
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#define MEMSCRUB_AHBS_UECNT_SHIFT 14
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#define MEMSCRUB_AHBS_UECNT_MASK 0x3fc000U
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#define MEMSCRUB_AHBS_UECNT_GET( _reg ) \
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( ( ( _reg ) & MEMSCRUB_AHBS_UECNT_MASK ) >> \
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MEMSCRUB_AHBS_UECNT_SHIFT )
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#define MEMSCRUB_AHBS_UECNT_SET( _reg, _val ) \
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( ( ( _reg ) & ~MEMSCRUB_AHBS_UECNT_MASK ) | \
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( ( ( _val ) << MEMSCRUB_AHBS_UECNT_SHIFT ) & \
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MEMSCRUB_AHBS_UECNT_MASK ) )
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#define MEMSCRUB_AHBS_UECNT( _val ) \
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( ( ( _val ) << MEMSCRUB_AHBS_UECNT_SHIFT ) & \
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MEMSCRUB_AHBS_UECNT_MASK )
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#define MEMSCRUB_AHBS_DONE 0x2000U
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#define MEMSCRUB_AHBS_SEC 0x800U
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#define MEMSCRUB_AHBS_SBC 0x400U
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#define MEMSCRUB_AHBS_CE 0x200U
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#define MEMSCRUB_AHBS_NE 0x100U
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#define MEMSCRUB_AHBS_HWRITE 0x80U
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#define MEMSCRUB_AHBS_HMASTER_SHIFT 3
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#define MEMSCRUB_AHBS_HMASTER_MASK 0x78U
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#define MEMSCRUB_AHBS_HMASTER_GET( _reg ) \
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( ( ( _reg ) & MEMSCRUB_AHBS_HMASTER_MASK ) >> \
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MEMSCRUB_AHBS_HMASTER_SHIFT )
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#define MEMSCRUB_AHBS_HMASTER_SET( _reg, _val ) \
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( ( ( _reg ) & ~MEMSCRUB_AHBS_HMASTER_MASK ) | \
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( ( ( _val ) << MEMSCRUB_AHBS_HMASTER_SHIFT ) & \
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MEMSCRUB_AHBS_HMASTER_MASK ) )
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#define MEMSCRUB_AHBS_HMASTER( _val ) \
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( ( ( _val ) << MEMSCRUB_AHBS_HMASTER_SHIFT ) & \
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MEMSCRUB_AHBS_HMASTER_MASK )
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#define MEMSCRUB_AHBS_HSIZE_SHIFT 0
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#define MEMSCRUB_AHBS_HSIZE_MASK 0x7U
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#define MEMSCRUB_AHBS_HSIZE_GET( _reg ) \
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( ( ( _reg ) & MEMSCRUB_AHBS_HSIZE_MASK ) >> \
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MEMSCRUB_AHBS_HSIZE_SHIFT )
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#define MEMSCRUB_AHBS_HSIZE_SET( _reg, _val ) \
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( ( ( _reg ) & ~MEMSCRUB_AHBS_HSIZE_MASK ) | \
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( ( ( _val ) << MEMSCRUB_AHBS_HSIZE_SHIFT ) & \
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MEMSCRUB_AHBS_HSIZE_MASK ) )
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#define MEMSCRUB_AHBS_HSIZE( _val ) \
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( ( ( _val ) << MEMSCRUB_AHBS_HSIZE_SHIFT ) & \
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MEMSCRUB_AHBS_HSIZE_MASK )
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/** @} */
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/**
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* @defgroup RTEMSDeviceGRLIBMEMSCRUBAHBFAR \
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* AHB Failing Address Register (AHBFAR)
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*
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* @brief This group contains register bit definitions.
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*
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* @{
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*/
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#define MEMSCRUB_AHBFAR_AHB_FAILING_ADDRESS_SHIFT 0
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#define MEMSCRUB_AHBFAR_AHB_FAILING_ADDRESS_MASK 0xffffffffU
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#define MEMSCRUB_AHBFAR_AHB_FAILING_ADDRESS_GET( _reg ) \
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( ( ( _reg ) & MEMSCRUB_AHBFAR_AHB_FAILING_ADDRESS_MASK ) >> \
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MEMSCRUB_AHBFAR_AHB_FAILING_ADDRESS_SHIFT )
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#define MEMSCRUB_AHBFAR_AHB_FAILING_ADDRESS_SET( _reg, _val ) \
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( ( ( _reg ) & ~MEMSCRUB_AHBFAR_AHB_FAILING_ADDRESS_MASK ) | \
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( ( ( _val ) << MEMSCRUB_AHBFAR_AHB_FAILING_ADDRESS_SHIFT ) & \
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MEMSCRUB_AHBFAR_AHB_FAILING_ADDRESS_MASK ) )
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#define MEMSCRUB_AHBFAR_AHB_FAILING_ADDRESS( _val ) \
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( ( ( _val ) << MEMSCRUB_AHBFAR_AHB_FAILING_ADDRESS_SHIFT ) & \
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MEMSCRUB_AHBFAR_AHB_FAILING_ADDRESS_MASK )
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/** @} */
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/**
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* @defgroup RTEMSDeviceGRLIBMEMSCRUBAHBERC \
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* AHB Error configuration register (AHBERC)
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*
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* @brief This group contains register bit definitions.
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*
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* @{
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*/
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#define MEMSCRUB_AHBERC_CECNTT_SHIFT 22
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#define MEMSCRUB_AHBERC_CECNTT_MASK 0xffc00000U
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#define MEMSCRUB_AHBERC_CECNTT_GET( _reg ) \
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( ( ( _reg ) & MEMSCRUB_AHBERC_CECNTT_MASK ) >> \
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MEMSCRUB_AHBERC_CECNTT_SHIFT )
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#define MEMSCRUB_AHBERC_CECNTT_SET( _reg, _val ) \
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( ( ( _reg ) & ~MEMSCRUB_AHBERC_CECNTT_MASK ) | \
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( ( ( _val ) << MEMSCRUB_AHBERC_CECNTT_SHIFT ) & \
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MEMSCRUB_AHBERC_CECNTT_MASK ) )
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#define MEMSCRUB_AHBERC_CECNTT( _val ) \
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( ( ( _val ) << MEMSCRUB_AHBERC_CECNTT_SHIFT ) & \
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MEMSCRUB_AHBERC_CECNTT_MASK )
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#define MEMSCRUB_AHBERC_UECNTT_SHIFT 14
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#define MEMSCRUB_AHBERC_UECNTT_MASK 0x3fc000U
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#define MEMSCRUB_AHBERC_UECNTT_GET( _reg ) \
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( ( ( _reg ) & MEMSCRUB_AHBERC_UECNTT_MASK ) >> \
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MEMSCRUB_AHBERC_UECNTT_SHIFT )
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#define MEMSCRUB_AHBERC_UECNTT_SET( _reg, _val ) \
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( ( ( _reg ) & ~MEMSCRUB_AHBERC_UECNTT_MASK ) | \
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( ( ( _val ) << MEMSCRUB_AHBERC_UECNTT_SHIFT ) & \
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MEMSCRUB_AHBERC_UECNTT_MASK ) )
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#define MEMSCRUB_AHBERC_UECNTT( _val ) \
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( ( ( _val ) << MEMSCRUB_AHBERC_UECNTT_SHIFT ) & \
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MEMSCRUB_AHBERC_UECNTT_MASK )
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#define MEMSCRUB_AHBERC_CECTE 0x2U
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#define MEMSCRUB_AHBERC_UECTE 0x1U
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/** @} */
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/**
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* @defgroup RTEMSDeviceGRLIBMEMSCRUBSTAT Status register (STAT)
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*
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* @brief This group contains register bit definitions.
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*
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* @{
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*/
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#define MEMSCRUB_STAT_RUNCOUNT_SHIFT 22
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#define MEMSCRUB_STAT_RUNCOUNT_MASK 0xffc00000U
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#define MEMSCRUB_STAT_RUNCOUNT_GET( _reg ) \
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( ( ( _reg ) & MEMSCRUB_STAT_RUNCOUNT_MASK ) >> \
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MEMSCRUB_STAT_RUNCOUNT_SHIFT )
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#define MEMSCRUB_STAT_RUNCOUNT_SET( _reg, _val ) \
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( ( ( _reg ) & ~MEMSCRUB_STAT_RUNCOUNT_MASK ) | \
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( ( ( _val ) << MEMSCRUB_STAT_RUNCOUNT_SHIFT ) & \
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MEMSCRUB_STAT_RUNCOUNT_MASK ) )
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#define MEMSCRUB_STAT_RUNCOUNT( _val ) \
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( ( ( _val ) << MEMSCRUB_STAT_RUNCOUNT_SHIFT ) & \
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MEMSCRUB_STAT_RUNCOUNT_MASK )
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#define MEMSCRUB_STAT_BLKCOUNT_SHIFT 14
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#define MEMSCRUB_STAT_BLKCOUNT_MASK 0x3fc000U
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#define MEMSCRUB_STAT_BLKCOUNT_GET( _reg ) \
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( ( ( _reg ) & MEMSCRUB_STAT_BLKCOUNT_MASK ) >> \
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MEMSCRUB_STAT_BLKCOUNT_SHIFT )
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#define MEMSCRUB_STAT_BLKCOUNT_SET( _reg, _val ) \
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( ( ( _reg ) & ~MEMSCRUB_STAT_BLKCOUNT_MASK ) | \
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( ( ( _val ) << MEMSCRUB_STAT_BLKCOUNT_SHIFT ) & \
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MEMSCRUB_STAT_BLKCOUNT_MASK ) )
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#define MEMSCRUB_STAT_BLKCOUNT( _val ) \
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( ( ( _val ) << MEMSCRUB_STAT_BLKCOUNT_SHIFT ) & \
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MEMSCRUB_STAT_BLKCOUNT_MASK )
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#define MEMSCRUB_STAT_DONE 0x2000U
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#define MEMSCRUB_STAT_BURSTLEN_SHIFT 1
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#define MEMSCRUB_STAT_BURSTLEN_MASK 0x1eU
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#define MEMSCRUB_STAT_BURSTLEN_GET( _reg ) \
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( ( ( _reg ) & MEMSCRUB_STAT_BURSTLEN_MASK ) >> \
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MEMSCRUB_STAT_BURSTLEN_SHIFT )
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#define MEMSCRUB_STAT_BURSTLEN_SET( _reg, _val ) \
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( ( ( _reg ) & ~MEMSCRUB_STAT_BURSTLEN_MASK ) | \
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( ( ( _val ) << MEMSCRUB_STAT_BURSTLEN_SHIFT ) & \
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MEMSCRUB_STAT_BURSTLEN_MASK ) )
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#define MEMSCRUB_STAT_BURSTLEN( _val ) \
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( ( ( _val ) << MEMSCRUB_STAT_BURSTLEN_SHIFT ) & \
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MEMSCRUB_STAT_BURSTLEN_MASK )
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#define MEMSCRUB_STAT_ACTIVE 0x1U
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/** @} */
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/**
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* @defgroup RTEMSDeviceGRLIBMEMSCRUBCONFIG Configuration register (CONFIG)
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*
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* @brief This group contains register bit definitions.
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*
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* @{
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*/
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#define MEMSCRUB_CONFIG_DELAY_SHIFT 8
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#define MEMSCRUB_CONFIG_DELAY_MASK 0xff00U
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#define MEMSCRUB_CONFIG_DELAY_GET( _reg ) \
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( ( ( _reg ) & MEMSCRUB_CONFIG_DELAY_MASK ) >> \
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MEMSCRUB_CONFIG_DELAY_SHIFT )
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#define MEMSCRUB_CONFIG_DELAY_SET( _reg, _val ) \
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( ( ( _reg ) & ~MEMSCRUB_CONFIG_DELAY_MASK ) | \
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( ( ( _val ) << MEMSCRUB_CONFIG_DELAY_SHIFT ) & \
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MEMSCRUB_CONFIG_DELAY_MASK ) )
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#define MEMSCRUB_CONFIG_DELAY( _val ) \
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( ( ( _val ) << MEMSCRUB_CONFIG_DELAY_SHIFT ) & \
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MEMSCRUB_CONFIG_DELAY_MASK )
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#define MEMSCRUB_CONFIG_IRQD 0x80U
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#define MEMSCRUB_CONFIG_SERA 0x20U
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#define MEMSCRUB_CONFIG_LOOP 0x10U
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#define MEMSCRUB_CONFIG_MODE_SHIFT 2
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#define MEMSCRUB_CONFIG_MODE_MASK 0xcU
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#define MEMSCRUB_CONFIG_MODE_GET( _reg ) \
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( ( ( _reg ) & MEMSCRUB_CONFIG_MODE_MASK ) >> \
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MEMSCRUB_CONFIG_MODE_SHIFT )
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#define MEMSCRUB_CONFIG_MODE_SET( _reg, _val ) \
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( ( ( _reg ) & ~MEMSCRUB_CONFIG_MODE_MASK ) | \
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( ( ( _val ) << MEMSCRUB_CONFIG_MODE_SHIFT ) & \
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MEMSCRUB_CONFIG_MODE_MASK ) )
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#define MEMSCRUB_CONFIG_MODE( _val ) \
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( ( ( _val ) << MEMSCRUB_CONFIG_MODE_SHIFT ) & \
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MEMSCRUB_CONFIG_MODE_MASK )
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#define MEMSCRUB_CONFIG_ES 0x2U
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#define MEMSCRUB_CONFIG_SCEN 0x1U
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/** @} */
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/**
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* @defgroup RTEMSDeviceGRLIBMEMSCRUBRANGEL Range low address register (RANGEL)
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*
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* @brief This group contains register bit definitions.
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*
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* @{
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*/
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#define MEMSCRUB_RANGEL_RLADDR_SHIFT 0
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#define MEMSCRUB_RANGEL_RLADDR_MASK 0xffffffffU
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#define MEMSCRUB_RANGEL_RLADDR_GET( _reg ) \
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( ( ( _reg ) & MEMSCRUB_RANGEL_RLADDR_MASK ) >> \
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MEMSCRUB_RANGEL_RLADDR_SHIFT )
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#define MEMSCRUB_RANGEL_RLADDR_SET( _reg, _val ) \
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( ( ( _reg ) & ~MEMSCRUB_RANGEL_RLADDR_MASK ) | \
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( ( ( _val ) << MEMSCRUB_RANGEL_RLADDR_SHIFT ) & \
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MEMSCRUB_RANGEL_RLADDR_MASK ) )
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#define MEMSCRUB_RANGEL_RLADDR( _val ) \
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( ( ( _val ) << MEMSCRUB_RANGEL_RLADDR_SHIFT ) & \
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MEMSCRUB_RANGEL_RLADDR_MASK )
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/** @} */
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/**
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* @defgroup RTEMSDeviceGRLIBMEMSCRUBRANGEH \
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* Range high address register (RANGEH)
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*
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* @brief This group contains register bit definitions.
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*
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* @{
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*/
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#define MEMSCRUB_RANGEH_RHADDR_SHIFT 0
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#define MEMSCRUB_RANGEH_RHADDR_MASK 0xffffffffU
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#define MEMSCRUB_RANGEH_RHADDR_GET( _reg ) \
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( ( ( _reg ) & MEMSCRUB_RANGEH_RHADDR_MASK ) >> \
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MEMSCRUB_RANGEH_RHADDR_SHIFT )
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#define MEMSCRUB_RANGEH_RHADDR_SET( _reg, _val ) \
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( ( ( _reg ) & ~MEMSCRUB_RANGEH_RHADDR_MASK ) | \
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( ( ( _val ) << MEMSCRUB_RANGEH_RHADDR_SHIFT ) & \
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MEMSCRUB_RANGEH_RHADDR_MASK ) )
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#define MEMSCRUB_RANGEH_RHADDR( _val ) \
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( ( ( _val ) << MEMSCRUB_RANGEH_RHADDR_SHIFT ) & \
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MEMSCRUB_RANGEH_RHADDR_MASK )
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/** @} */
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/**
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* @defgroup RTEMSDeviceGRLIBMEMSCRUBPOS Position register (POS)
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*
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* @brief This group contains register bit definitions.
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*
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* @{
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*/
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#define MEMSCRUB_POS_POSITION_SHIFT 0
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#define MEMSCRUB_POS_POSITION_MASK 0xffffffffU
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#define MEMSCRUB_POS_POSITION_GET( _reg ) \
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( ( ( _reg ) & MEMSCRUB_POS_POSITION_MASK ) >> \
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MEMSCRUB_POS_POSITION_SHIFT )
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#define MEMSCRUB_POS_POSITION_SET( _reg, _val ) \
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( ( ( _reg ) & ~MEMSCRUB_POS_POSITION_MASK ) | \
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( ( ( _val ) << MEMSCRUB_POS_POSITION_SHIFT ) & \
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MEMSCRUB_POS_POSITION_MASK ) )
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#define MEMSCRUB_POS_POSITION( _val ) \
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( ( ( _val ) << MEMSCRUB_POS_POSITION_SHIFT ) & \
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MEMSCRUB_POS_POSITION_MASK )
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/** @} */
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/**
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* @defgroup RTEMSDeviceGRLIBMEMSCRUBETHRES Error threshold register (ETHRES)
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*
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* @brief This group contains register bit definitions.
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*
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* @{
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*/
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#define MEMSCRUB_ETHRES_RECT_SHIFT 22
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#define MEMSCRUB_ETHRES_RECT_MASK 0xffc00000U
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#define MEMSCRUB_ETHRES_RECT_GET( _reg ) \
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( ( ( _reg ) & MEMSCRUB_ETHRES_RECT_MASK ) >> \
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MEMSCRUB_ETHRES_RECT_SHIFT )
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#define MEMSCRUB_ETHRES_RECT_SET( _reg, _val ) \
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( ( ( _reg ) & ~MEMSCRUB_ETHRES_RECT_MASK ) | \
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( ( ( _val ) << MEMSCRUB_ETHRES_RECT_SHIFT ) & \
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MEMSCRUB_ETHRES_RECT_MASK ) )
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#define MEMSCRUB_ETHRES_RECT( _val ) \
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( ( ( _val ) << MEMSCRUB_ETHRES_RECT_SHIFT ) & \
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MEMSCRUB_ETHRES_RECT_MASK )
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#define MEMSCRUB_ETHRES_BECT_SHIFT 14
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#define MEMSCRUB_ETHRES_BECT_MASK 0x3fc000U
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#define MEMSCRUB_ETHRES_BECT_GET( _reg ) \
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( ( ( _reg ) & MEMSCRUB_ETHRES_BECT_MASK ) >> \
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MEMSCRUB_ETHRES_BECT_SHIFT )
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#define MEMSCRUB_ETHRES_BECT_SET( _reg, _val ) \
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( ( ( _reg ) & ~MEMSCRUB_ETHRES_BECT_MASK ) | \
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( ( ( _val ) << MEMSCRUB_ETHRES_BECT_SHIFT ) & \
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MEMSCRUB_ETHRES_BECT_MASK ) )
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#define MEMSCRUB_ETHRES_BECT( _val ) \
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( ( ( _val ) << MEMSCRUB_ETHRES_BECT_SHIFT ) & \
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MEMSCRUB_ETHRES_BECT_MASK )
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#define MEMSCRUB_ETHRES_RECTE 0x2U
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#define MEMSCRUB_ETHRES_BECTE 0x1U
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/** @} */
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/**
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* @defgroup RTEMSDeviceGRLIBMEMSCRUBINIT Initialisation data register (INIT)
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*
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* @brief This group contains register bit definitions.
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*
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* @{
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*/
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#define MEMSCRUB_INIT_DATA_SHIFT 0
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#define MEMSCRUB_INIT_DATA_MASK 0xffffffffU
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#define MEMSCRUB_INIT_DATA_GET( _reg ) \
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( ( ( _reg ) & MEMSCRUB_INIT_DATA_MASK ) >> \
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MEMSCRUB_INIT_DATA_SHIFT )
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#define MEMSCRUB_INIT_DATA_SET( _reg, _val ) \
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( ( ( _reg ) & ~MEMSCRUB_INIT_DATA_MASK ) | \
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( ( ( _val ) << MEMSCRUB_INIT_DATA_SHIFT ) & \
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MEMSCRUB_INIT_DATA_MASK ) )
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#define MEMSCRUB_INIT_DATA( _val ) \
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( ( ( _val ) << MEMSCRUB_INIT_DATA_SHIFT ) & \
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MEMSCRUB_INIT_DATA_MASK )
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/** @} */
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/**
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* @defgroup RTEMSDeviceGRLIBMEMSCRUBRANGEL2 \
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* Second range low address register (RANGEL2)
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*
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* @brief This group contains register bit definitions.
|
|
*
|
|
* @{
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|
*/
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|
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#define MEMSCRUB_RANGEL2_RLADDR_SHIFT 0
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#define MEMSCRUB_RANGEL2_RLADDR_MASK 0xffffffffU
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|
#define MEMSCRUB_RANGEL2_RLADDR_GET( _reg ) \
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( ( ( _reg ) & MEMSCRUB_RANGEL2_RLADDR_MASK ) >> \
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MEMSCRUB_RANGEL2_RLADDR_SHIFT )
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|
#define MEMSCRUB_RANGEL2_RLADDR_SET( _reg, _val ) \
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|
( ( ( _reg ) & ~MEMSCRUB_RANGEL2_RLADDR_MASK ) | \
|
|
( ( ( _val ) << MEMSCRUB_RANGEL2_RLADDR_SHIFT ) & \
|
|
MEMSCRUB_RANGEL2_RLADDR_MASK ) )
|
|
#define MEMSCRUB_RANGEL2_RLADDR( _val ) \
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|
( ( ( _val ) << MEMSCRUB_RANGEL2_RLADDR_SHIFT ) & \
|
|
MEMSCRUB_RANGEL2_RLADDR_MASK )
|
|
|
|
/** @} */
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|
|
|
/**
|
|
* @defgroup RTEMSDeviceGRLIBMEMSCRUBRANGEH2 \
|
|
* Second range high address register (RANGEH2)
|
|
*
|
|
* @brief This group contains register bit definitions.
|
|
*
|
|
* @{
|
|
*/
|
|
|
|
#define MEMSCRUB_RANGEH2_RHADDR_SHIFT 0
|
|
#define MEMSCRUB_RANGEH2_RHADDR_MASK 0xffffffffU
|
|
#define MEMSCRUB_RANGEH2_RHADDR_GET( _reg ) \
|
|
( ( ( _reg ) & MEMSCRUB_RANGEH2_RHADDR_MASK ) >> \
|
|
MEMSCRUB_RANGEH2_RHADDR_SHIFT )
|
|
#define MEMSCRUB_RANGEH2_RHADDR_SET( _reg, _val ) \
|
|
( ( ( _reg ) & ~MEMSCRUB_RANGEH2_RHADDR_MASK ) | \
|
|
( ( ( _val ) << MEMSCRUB_RANGEH2_RHADDR_SHIFT ) & \
|
|
MEMSCRUB_RANGEH2_RHADDR_MASK ) )
|
|
#define MEMSCRUB_RANGEH2_RHADDR( _val ) \
|
|
( ( ( _val ) << MEMSCRUB_RANGEH2_RHADDR_SHIFT ) & \
|
|
MEMSCRUB_RANGEH2_RHADDR_MASK )
|
|
|
|
/** @} */
|
|
|
|
/**
|
|
* @brief This structure defines the MEMSCRUB register block memory map.
|
|
*/
|
|
typedef struct memscrub {
|
|
/**
|
|
* @brief See @ref RTEMSDeviceGRLIBMEMSCRUBAHBS.
|
|
*/
|
|
uint32_t ahbs;
|
|
|
|
/**
|
|
* @brief See @ref RTEMSDeviceGRLIBMEMSCRUBAHBFAR.
|
|
*/
|
|
uint32_t ahbfar;
|
|
|
|
/**
|
|
* @brief See @ref RTEMSDeviceGRLIBMEMSCRUBAHBERC.
|
|
*/
|
|
uint32_t ahberc;
|
|
|
|
uint32_t reserved_c_10;
|
|
|
|
/**
|
|
* @brief See @ref RTEMSDeviceGRLIBMEMSCRUBSTAT.
|
|
*/
|
|
uint32_t stat;
|
|
|
|
/**
|
|
* @brief See @ref RTEMSDeviceGRLIBMEMSCRUBCONFIG.
|
|
*/
|
|
uint32_t config;
|
|
|
|
/**
|
|
* @brief See @ref RTEMSDeviceGRLIBMEMSCRUBRANGEL.
|
|
*/
|
|
uint32_t rangel;
|
|
|
|
/**
|
|
* @brief See @ref RTEMSDeviceGRLIBMEMSCRUBRANGEH.
|
|
*/
|
|
uint32_t rangeh;
|
|
|
|
/**
|
|
* @brief See @ref RTEMSDeviceGRLIBMEMSCRUBPOS.
|
|
*/
|
|
uint32_t pos;
|
|
|
|
/**
|
|
* @brief See @ref RTEMSDeviceGRLIBMEMSCRUBETHRES.
|
|
*/
|
|
uint32_t ethres;
|
|
|
|
/**
|
|
* @brief See @ref RTEMSDeviceGRLIBMEMSCRUBINIT.
|
|
*/
|
|
uint32_t init;
|
|
|
|
/**
|
|
* @brief See @ref RTEMSDeviceGRLIBMEMSCRUBRANGEL2.
|
|
*/
|
|
uint32_t rangel2;
|
|
|
|
/**
|
|
* @brief See @ref RTEMSDeviceGRLIBMEMSCRUBRANGEH2.
|
|
*/
|
|
uint32_t rangeh2;
|
|
} memscrub;
|
|
|
|
/** @} */
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* _GRLIB_MEMSCRUB_REGS_H */
|