Files
rtems/c/src/lib/libcpu
Pavel Pisa 6e6a77a690 bsps/arm: reorganize CP15 code to allow clean and invalidate ARMv7 cache by level.
New function arm_cp15_cache_invalidate_level and arm_cp15_cache_clean_level
can be used to maintain single cache level (instruction or data).
2016-09-07 20:29:39 +02:00
..
2014-12-05 07:47:32 +01:00
2014-12-05 07:47:32 +01:00
2014-12-05 07:47:32 +01:00
2015-02-23 15:42:59 -05:00

This is the README file for libcpu.

This directory contains reusable libraries which are CPU dependent but not
target board dependent.  For example, the PowerPC has an on CPU decrementer
register which may be used by all PowerPC BSP's for the Clock and Timer
Drivers.

Other examples include the caching support for the m68k CPU models and
MIPS CPU model exception vectoring routines.  This level of support
will make it easier for others developing embedded applications on a given
CPU.