forked from Imagelibrary/rtems
6aa7c1a483
* cpu.c, cpu.h, cpuModel.S, cpuModel.h, displayCpu.c, idtr.S, page.c: URL for license changed.
289 lines
8.2 KiB
C
289 lines
8.2 KiB
C
/*
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* cpu.c - This file contains implementation of C function to
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* instantiate IDT entries. More detailled information can be found
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* on Intel site and more precisely in the following book :
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*
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* Pentium Processor family
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* Developper's Manual
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*
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* Volume 3 : Architecture and Programming Manual
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*
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* Copyright (C) 1998 Eric Valette (valette@crf.canon.fr)
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* Canon Centre Recherche France.
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*
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* The license and distribution terms for this file may be
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* found in found in the file LICENSE in this distribution or at
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* http://www.rtems.com/license/LICENSE.
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*
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* $Id$
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*/
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#include <libcpu/cpu.h>
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#include <irq.h>
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static rtems_raw_irq_connect_data* raw_irq_table;
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static rtems_raw_irq_connect_data default_raw_irq_entry;
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static interrupt_gate_descriptor default_idt_entry;
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static rtems_raw_irq_global_settings* local_settings;
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void create_interrupt_gate_descriptor (interrupt_gate_descriptor* idtEntry,
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rtems_raw_irq_hdl hdl)
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{
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idtEntry->low_offsets_bits = (((unsigned) hdl) & 0xffff);
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idtEntry->segment_selector = i386_get_cs();
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idtEntry->fixed_value_bits = 0;
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idtEntry->gate_type = 0xe;
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idtEntry->privilege = 0;
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idtEntry->present = 1;
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idtEntry->high_offsets_bits = ((((unsigned) hdl) >> 16) & 0xffff);
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}
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rtems_raw_irq_hdl get_hdl_from_vector(rtems_vector_offset index)
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{
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rtems_raw_irq_hdl hdl;
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interrupt_gate_descriptor* idt_entry_tbl;
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unsigned limit;
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i386_get_info_from_IDTR (&idt_entry_tbl, &limit);
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/* Convert limit into number of entries */
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limit = (limit + 1) / sizeof(interrupt_gate_descriptor);
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if(index >= limit) {
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return 0;
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}
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* ((unsigned int*) &hdl) = (idt_entry_tbl[index].low_offsets_bits |
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(idt_entry_tbl[index].high_offsets_bits << 16));
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return hdl;
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}
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int i386_set_idt_entry (const rtems_raw_irq_connect_data* irq)
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{
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interrupt_gate_descriptor* idt_entry_tbl;
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unsigned limit;
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unsigned int level;
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i386_get_info_from_IDTR (&idt_entry_tbl, &limit);
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/* Convert limit into number of entries */
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limit = (limit + 1) / sizeof(interrupt_gate_descriptor);
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if (irq->idtIndex >= limit) {
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return 0;
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}
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/*
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* Check if default handler is actually connected. If not issue an error.
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* You must first get the current handler via i386_get_current_idt_entry
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* and then disconnect it using i386_delete_idt_entry.
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* RATIONALE : to always have the same transition by forcing the user
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* to get the previous handler before accepting to disconnect.
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*/
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if (get_hdl_from_vector(irq->idtIndex) != default_raw_irq_entry.hdl) {
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return 0;
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}
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_CPU_ISR_Disable(level);
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raw_irq_table [irq->idtIndex] = *irq;
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create_interrupt_gate_descriptor (&idt_entry_tbl[irq->idtIndex], irq->hdl);
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irq->on(irq);
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_CPU_ISR_Enable(level);
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return 1;
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}
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void _CPU_ISR_install_vector (unsigned vector,
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void* hdl,
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void** oldHdl)
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{
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interrupt_gate_descriptor* idt_entry_tbl;
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unsigned limit;
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interrupt_gate_descriptor new;
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unsigned int level;
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i386_get_info_from_IDTR (&idt_entry_tbl, &limit);
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/* Convert limit into number of entries */
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limit = (limit + 1) / sizeof(interrupt_gate_descriptor);
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if (vector >= limit) {
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return;
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}
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_CPU_ISR_Disable(level)
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* ((unsigned int *) oldHdl) = idt_entry_tbl[vector].low_offsets_bits |
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(idt_entry_tbl[vector].high_offsets_bits << 16);
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create_interrupt_gate_descriptor(&new, hdl);
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idt_entry_tbl[vector] = new;
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_CPU_ISR_Enable(level);
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}
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int i386_get_current_idt_entry (rtems_raw_irq_connect_data* irq)
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{
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interrupt_gate_descriptor* idt_entry_tbl;
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unsigned limit;
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i386_get_info_from_IDTR (&idt_entry_tbl, &limit);
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/* Convert limit into number of entries */
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limit = (limit + 1) / sizeof(interrupt_gate_descriptor);
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if (irq->idtIndex >= limit) {
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return 0;
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}
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raw_irq_table [irq->idtIndex].hdl = get_hdl_from_vector(irq->idtIndex);
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*irq = raw_irq_table [irq->idtIndex];
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return 1;
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}
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int i386_delete_idt_entry (const rtems_raw_irq_connect_data* irq)
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{
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interrupt_gate_descriptor* idt_entry_tbl;
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unsigned limit;
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unsigned int level;
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i386_get_info_from_IDTR (&idt_entry_tbl, &limit);
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/* Convert limit into number of entries */
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limit = (limit + 1) / sizeof(interrupt_gate_descriptor);
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if (irq->idtIndex >= limit) {
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return 0;
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}
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/*
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* Check if handler passed is actually connected. If not issue an error.
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* You must first get the current handler via i386_get_current_idt_entry
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* and then disconnect it using i386_delete_idt_entry.
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* RATIONALE : to always have the same transition by forcing the user
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* to get the previous handler before accepting to disconnect.
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*/
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if (get_hdl_from_vector(irq->idtIndex) != irq->hdl){
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return 0;
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}
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_CPU_ISR_Disable(level);
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idt_entry_tbl[irq->idtIndex] = default_idt_entry;
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irq->off(irq);
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raw_irq_table[irq->idtIndex] = default_raw_irq_entry;
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raw_irq_table[irq->idtIndex].idtIndex = irq->idtIndex;
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_CPU_ISR_Enable(level);
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return 1;
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}
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/*
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* Caution this function assumes the IDTR has been already set.
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*/
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int i386_init_idt (rtems_raw_irq_global_settings* config)
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{
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unsigned limit;
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unsigned i;
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unsigned level;
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interrupt_gate_descriptor* idt_entry_tbl;
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i386_get_info_from_IDTR (&idt_entry_tbl, &limit);
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/* Convert limit into number of entries */
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limit = (limit + 1) / sizeof(interrupt_gate_descriptor);
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if (config->idtSize != limit) {
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return 0;
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}
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/*
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* store various accelarators
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*/
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raw_irq_table = config->rawIrqHdlTbl;
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local_settings = config;
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default_raw_irq_entry = config->defaultRawEntry;
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_CPU_ISR_Disable(level);
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create_interrupt_gate_descriptor (&default_idt_entry, default_raw_irq_entry.hdl);
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for (i=0; i < limit; i++) {
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interrupt_gate_descriptor new;
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create_interrupt_gate_descriptor (&new, raw_irq_table[i].hdl);
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idt_entry_tbl[i] = new;
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if (raw_irq_table[i].hdl != default_raw_irq_entry.hdl) {
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raw_irq_table[i].on(&raw_irq_table[i]);
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}
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else {
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raw_irq_table[i].off(&raw_irq_table[i]);
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}
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}
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_CPU_ISR_Enable(level);
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return 1;
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}
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int i386_get_idt_config (rtems_raw_irq_global_settings** config)
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{
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*config = local_settings;
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return 1;
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}
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/*
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* Caution this function assumes the GDTR has been already set.
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*/
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int i386_set_gdt_entry (unsigned short segment_selector, unsigned base,
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unsigned limit)
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{
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unsigned gdt_limit;
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unsigned short tmp_segment = 0;
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unsigned int limit_adjusted;
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segment_descriptors* gdt_entry_tbl;
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i386_get_info_from_GDTR (&gdt_entry_tbl, &gdt_limit);
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if (segment_selector > limit) {
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return 0;
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}
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/*
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* set up limit first
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*/
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limit_adjusted = limit;
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if ( limit > 4095 ) {
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gdt_entry_tbl[segment_selector].granularity = 1;
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limit_adjusted /= 4096;
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}
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gdt_entry_tbl[segment_selector].limit_15_0 = limit_adjusted & 0xffff;
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gdt_entry_tbl[segment_selector].limit_19_16 = (limit_adjusted >> 16) & 0xf;
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/*
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* set up base
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*/
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gdt_entry_tbl[segment_selector].base_address_15_0 = base & 0xffff;
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gdt_entry_tbl[segment_selector].base_address_23_16 = (base >> 16) & 0xff;
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gdt_entry_tbl[segment_selector].base_address_31_24 = (base >> 24) & 0xff;
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/*
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* set up descriptor type (this may well becomes a parameter if needed)
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*/
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gdt_entry_tbl[segment_selector].type = 2; /* Data R/W */
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gdt_entry_tbl[segment_selector].descriptor_type = 1; /* Code or Data */
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gdt_entry_tbl[segment_selector].privilege = 0; /* ring 0 */
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gdt_entry_tbl[segment_selector].present = 1; /* not present */
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/*
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* Now, reload all segment registers so the limit takes effect.
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*/
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asm volatile( "movw %%ds,%0 ; movw %0,%%ds
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movw %%es,%0 ; movw %0,%%es
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movw %%fs,%0 ; movw %0,%%fs
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movw %%gs,%0 ; movw %0,%%gs
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movw %%ss,%0 ; movw %0,%%ss"
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: "=r" (tmp_segment)
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: "0" (tmp_segment)
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);
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return 1;
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}
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