forked from Imagelibrary/rtems
3f03a6d2ef
Using the auto reload counter which generates the clock ticks for the timecounter or CPU counter is quite difficult and only works in uniprocessor configurations. Update #4954.
352 lines
12 KiB
C
352 lines
12 KiB
C
/* SPDX-License-Identifier: BSD-2-Clause */
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/**
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* @file
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* @ingroup RTEMSBSPsSPARCLEON3
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* @brief LEON3 BSP data types and macros
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*/
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/* leon.h
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*
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* LEON3 BSP data types and macros.
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*
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* COPYRIGHT (c) 1989-1998.
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* On-Line Applications Research Corporation (OAR).
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*
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* Modified for LEON3 BSP.
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* COPYRIGHT (c) 2004.
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* Gaisler Research.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _INCLUDE_LEON_h
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#define _INCLUDE_LEON_h
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#include <rtems.h>
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#include <amba.h>
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#include <grlib/io.h>
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#include <bsp/leon3.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define LEON_INTERRUPT_EXTERNAL_1 5
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#ifndef ASM
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/*
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* Trap Types for on-chip peripherals
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*
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* Source: Table 8 - Interrupt Trap Type and Default Priority Assignments
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*
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* NOTE: The priority level for each source corresponds to the least
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* significant nibble of the trap type.
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*/
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#define LEON_TRAP_TYPE( _source ) SPARC_INTERRUPT_SOURCE_TO_TRAP( _source )
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#define LEON_TRAP_SOURCE( _trap ) SPARC_INTERRUPT_TRAP_TO_SOURCE( _trap )
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#define LEON_INT_TRAP( _trap ) SPARC_IS_INTERRUPT_TRAP( _trap )
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/* /\* */
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/* * This is used to manipulate the on-chip registers. */
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/* * */
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/* * The following symbol must be defined in the linkcmds file and point */
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/* * to the correct location. */
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/* *\/ */
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/* Leon uses dynamic register mapping using amba configuration records */
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/* LEON_Register_Map is obsolete */
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/* extern LEON_Register_Map LEON_REG; */
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#endif
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/*
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* The following defines the bits in Memory Configuration Register 1.
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*/
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#define LEON_MEMORY_CONFIGURATION_PROM_SIZE_MASK 0x0003C000
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/*
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* The following defines the bits in Memory Configuration Register 1.
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*/
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#define LEON_MEMORY_CONFIGURATION_RAM_SIZE_MASK 0x00001E00
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/*
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* The following defines the bits in the Timer Control Register.
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*/
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#define LEON_REG_TIMER_CONTROL_EN 0x00000001 /* 1 = enable counting */
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/* 0 = hold scalar and counter */
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#define LEON_REG_TIMER_CONTROL_RL 0x00000002 /* 1 = reload at 0 */
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/* 0 = stop at 0 */
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#define LEON_REG_TIMER_CONTROL_LD 0x00000004 /* 1 = load counter */
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/* 0 = no function */
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/*
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* The following defines the bits in the UART Control Registers.
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*/
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#define LEON_REG_UART_CONTROL_RTD 0x000000FF /* RX/TX data */
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/*
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* The following defines the bits in the LEON UART Status Register.
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*/
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#define LEON_REG_UART_STATUS_DR 0x00000001 /* Data Ready */
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#define LEON_REG_UART_STATUS_TSE 0x00000002 /* TX Send Register Empty */
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#define LEON_REG_UART_STATUS_THE 0x00000004 /* TX Hold Register Empty */
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#define LEON_REG_UART_STATUS_BR 0x00000008 /* Break Error */
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#define LEON_REG_UART_STATUS_OE 0x00000010 /* RX Overrun Error */
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#define LEON_REG_UART_STATUS_PE 0x00000020 /* RX Parity Error */
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#define LEON_REG_UART_STATUS_FE 0x00000040 /* RX Framing Error */
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#define LEON_REG_UART_STATUS_TF 0x00000200 /* FIFO Full */
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#define LEON_REG_UART_STATUS_ERR 0x00000078 /* Error Mask */
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/*
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* The following defines the bits in the LEON UART Control Register.
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*/
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#define LEON_REG_UART_CTRL_RE 0x00000001 /* Receiver enable */
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#define LEON_REG_UART_CTRL_TE 0x00000002 /* Transmitter enable */
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#define LEON_REG_UART_CTRL_RI 0x00000004 /* Receiver interrupt enable */
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#define LEON_REG_UART_CTRL_TI 0x00000008 /* Transmitter interrupt enable */
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#define LEON_REG_UART_CTRL_PS 0x00000010 /* Parity select */
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#define LEON_REG_UART_CTRL_PE 0x00000020 /* Parity enable */
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#define LEON_REG_UART_CTRL_FL 0x00000040 /* Flow control enable */
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#define LEON_REG_UART_CTRL_LB 0x00000080 /* Loop Back enable */
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#define LEON_REG_UART_CTRL_DB 0x00000800 /* Debug FIFO enable */
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#define LEON_REG_UART_CTRL_SI 0x00004000 /* TX shift register empty IRQ enable */
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#define LEON_REG_UART_CTRL_FA 0x80000000 /* FIFO Available */
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#define LEON_REG_UART_CTRL_FA_BIT 31
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/* Macros used for manipulating bits in LEON3 GP Timer Control Register */
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#define LEON3_IRQMPSTATUS_CPUNR 28
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#define LEON3_IRQMPSTATUS_BROADCAST 27
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#ifndef ASM
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/*
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* Macros to manipulate the Interrupt Clear, Interrupt Force, Interrupt Mask,
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* and the Interrupt Pending Registers.
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*
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* NOTE: For operations which are not atomic, this code disables interrupts
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* to guarantee there are no intervening accesses to the same register.
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* The operations which read the register, modify the value and then
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* store the result back are vulnerable.
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*/
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#define LEON_Clear_interrupt( _source ) \
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grlib_store_32(&LEON3_IrqCtrl_Regs->iclear, 1U << (_source))
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#define LEON_Force_interrupt( _source ) \
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grlib_store_32(&LEON3_IrqCtrl_Regs->iforce0, 1U << (_source))
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#define LEON_Enable_interrupt_broadcast( _source ) \
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do { \
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rtems_interrupt_lock_context _lock_context; \
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uint32_t _mask = 1U << ( _source ); \
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uint32_t _brdcst; \
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LEON3_IRQCTRL_ACQUIRE( &_lock_context ); \
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_brdcst = grlib_load_32(&LEON3_IrqCtrl_Regs->brdcst); \
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_brdcst |= _mask; \
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grlib_store_32(&LEON3_IrqCtrl_Regs->brdcst, _brdcst); \
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LEON3_IRQCTRL_RELEASE( &_lock_context ); \
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} while (0)
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#define LEON_Disable_interrupt_broadcast( _source ) \
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do { \
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rtems_interrupt_lock_context _lock_context; \
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uint32_t _mask = 1U << ( _source ); \
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uint32_t _brdcst; \
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LEON3_IRQCTRL_ACQUIRE( &_lock_context ); \
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_brdcst = grlib_load_32(&LEON3_IrqCtrl_Regs->brdcst); \
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_brdcst &= ~_mask; \
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grlib_store_32(&LEON3_IrqCtrl_Regs->brdcst, _brdcst); \
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LEON3_IRQCTRL_RELEASE( &_lock_context ); \
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} while (0)
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#define LEON_Is_interrupt_pending( _source ) \
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(grlib_load_32(&LEON3_IrqCtrl_Regs->ipend) & (1U << (_source)))
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#define LEON_Cpu_Is_interrupt_masked( _source, _cpu ) \
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(!(grlib_load_32(&LEON3_IrqCtrl_Regs->pimask[_cpu]) & (1U << (_source))))
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#define LEON_Cpu_Mask_interrupt( _source, _cpu ) \
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do { \
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rtems_interrupt_lock_context _lock_context; \
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uint32_t _pimask; \
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LEON3_IRQCTRL_ACQUIRE( &_lock_context ); \
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_pimask = grlib_load_32(&LEON3_IrqCtrl_Regs->pimask[_cpu ]); \
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_pimask &= ~(1U << (_source)); \
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grlib_store_32(&LEON3_IrqCtrl_Regs->pimask[_cpu ], _pimask); \
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LEON3_IRQCTRL_RELEASE( &_lock_context ); \
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} while (0)
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#define LEON_Cpu_Unmask_interrupt( _source, _cpu ) \
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do { \
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rtems_interrupt_lock_context _lock_context; \
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uint32_t _pimask; \
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LEON3_IRQCTRL_ACQUIRE( &_lock_context ); \
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_pimask = grlib_load_32(&LEON3_IrqCtrl_Regs->pimask[_cpu ]); \
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_pimask |= 1U << (_source); \
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grlib_store_32(&LEON3_IrqCtrl_Regs->pimask[_cpu ], _pimask); \
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LEON3_IRQCTRL_RELEASE( &_lock_context ); \
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} while (0)
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#define LEON_Cpu_Disable_interrupt( _source, _previous, _cpu ) \
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do { \
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rtems_interrupt_lock_context _lock_context; \
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uint32_t _mask = 1U << (_source); \
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LEON3_IRQCTRL_ACQUIRE( &_lock_context ); \
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(_previous) = grlib_load_32(&LEON3_IrqCtrl_Regs->pimask[_cpu ]); \
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grlib_store_32(&LEON3_IrqCtrl_Regs->pimask[_cpu ], (_previous) & ~_mask); \
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LEON3_IRQCTRL_RELEASE( &_lock_context ); \
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(_previous) &= _mask; \
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} while (0)
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#define LEON_Cpu_Restore_interrupt( _source, _previous, _cpu ) \
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do { \
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rtems_interrupt_lock_context _lock_context; \
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uint32_t _pimask; \
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LEON3_IRQCTRL_ACQUIRE( &_lock_context ); \
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_pimask = grlib_load_32(&LEON3_IrqCtrl_Regs->pimask[_cpu ]); \
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_pimask &= ~(1U << (_source)); \
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_pimask |= _previous; \
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grlib_store_32(&LEON3_IrqCtrl_Regs->pimask[_cpu ], _pimask); \
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LEON3_IRQCTRL_RELEASE( &_lock_context ); \
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} while (0)
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/* Map single-cpu operations to local CPU */
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#define LEON_Is_interrupt_masked( _source ) \
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LEON_Cpu_Is_interrupt_masked(_source, _LEON3_Get_current_processor())
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#define LEON_Mask_interrupt(_source) \
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LEON_Cpu_Mask_interrupt(_source, _LEON3_Get_current_processor())
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#define LEON_Unmask_interrupt(_source) \
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LEON_Cpu_Unmask_interrupt(_source, _LEON3_Get_current_processor())
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#define LEON_Disable_interrupt(_source, _previous) \
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LEON_Cpu_Disable_interrupt(_source, _previous, _LEON3_Get_current_processor())
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#define LEON_Restore_interrupt(_source, _previous) \
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LEON_Cpu_Restore_interrupt(_source, _previous, _LEON3_Get_current_processor())
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/* Make all SPARC BSPs have common macros for interrupt handling */
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#define BSP_Clear_interrupt(_source) LEON_Clear_interrupt(_source)
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#define BSP_Force_interrupt(_source) LEON_Force_interrupt(_source)
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#define BSP_Is_interrupt_pending(_source) LEON_Is_interrupt_pending(_source)
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#define BSP_Is_interrupt_masked(_source) LEON_Is_interrupt_masked(_source)
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#define BSP_Unmask_interrupt(_source) LEON_Unmask_interrupt(_source)
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#define BSP_Mask_interrupt(_source) LEON_Mask_interrupt(_source)
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#define BSP_Disable_interrupt(_source, _previous) \
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LEON_Disable_interrupt(_source, _prev)
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#define BSP_Restore_interrupt(_source, _previous) \
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LEON_Restore_interrupt(_source, _previous)
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/* Make all SPARC BSPs have common macros for interrupt handling on any CPU */
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#define BSP_Cpu_Is_interrupt_masked(_source, _cpu) \
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LEON_Cpu_Is_interrupt_masked(_source, _cpu)
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#define BSP_Cpu_Unmask_interrupt(_source, _cpu) \
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LEON_Cpu_Unmask_interrupt(_source, _cpu)
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#define BSP_Cpu_Mask_interrupt(_source, _cpu) \
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LEON_Cpu_Mask_interrupt(_source, _cpu)
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#define BSP_Cpu_Disable_interrupt(_source, _previous, _cpu) \
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LEON_Cpu_Disable_interrupt(_source, _prev, _cpu)
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#define BSP_Cpu_Restore_interrupt(_source, _previous, _cpu) \
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LEON_Cpu_Restore_interrupt(_source, _previous, _cpu)
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/*
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* Each timer control register is organized as follows:
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*
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* D0 - Enable
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* 1 = enable counting
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* 0 = hold scaler and counter
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*
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* D1 - Counter Reload
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* 1 = reload counter at zero and restart
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* 0 = stop counter at zero
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*
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* D2 - Counter Load
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* 1 = load counter with preset value
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* 0 = no function
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*
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*/
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#define LEON_REG_TIMER_COUNTER_RELOAD_AT_ZERO 0x00000002
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#define LEON_REG_TIMER_COUNTER_STOP_AT_ZERO 0x00000000
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#define LEON_REG_TIMER_COUNTER_LOAD_COUNTER 0x00000004
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#define LEON_REG_TIMER_COUNTER_ENABLE_COUNTING 0x00000001
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#define LEON_REG_TIMER_COUNTER_DISABLE_COUNTING 0x00000000
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#define LEON_REG_TIMER_COUNTER_RELOAD_MASK 0x00000002
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#define LEON_REG_TIMER_COUNTER_ENABLE_MASK 0x00000001
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#define LEON_REG_TIMER_COUNTER_DEFINED_MASK 0x00000003
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#define LEON_REG_TIMER_COUNTER_CURRENT_MODE_MASK 0x00000003
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/* Load 32-bit word by forcing a cache-miss */
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static inline unsigned int leon_r32_no_cache(uintptr_t addr)
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{
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unsigned int tmp;
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__asm__ volatile (" lda [%1] 1, %0\n" : "=r"(tmp) : "r"(addr));
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return tmp;
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}
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/* Let user override which on-chip APBUART will be debug UART
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* 0 = Default APBUART. On MP system CPU0=APBUART0, CPU1=APBUART1...
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* 1 = APBUART[0]
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* 2 = APBUART[1]
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* 3 = APBUART[2]
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* ...
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*/
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extern int syscon_uart_index;
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#if !defined(LEON3_APBUART_BASE)
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/* Let user override which on-chip APBUART will be debug UART
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* 0 = Default APBUART. On MP system CPU0=APBUART0, CPU1=APBUART1...
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* 1 = APBUART[0]
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* 2 = APBUART[1]
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* 3 = APBUART[2]
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* ...
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*/
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extern int leon3_debug_uart_index;
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#endif
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#endif /* !ASM */
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#ifdef __cplusplus
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}
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#endif
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#endif /* !_INCLUDE_LEON_h */
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/* end of include file */
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