forked from Imagelibrary/rtems
5d5b9eeb08
This patch changes the license to BSD-2 for all source files where the copyright is held by Aeroflex Gaisler, Cobham Gaisler, or Gaisler Research. Some files also includes copyright right statements from OAR and/or embedded Brains in addition to Gaisler. Updates #3053.
1011 lines
24 KiB
C
1011 lines
24 KiB
C
/* SPDX-License-Identifier: BSD-2-Clause */
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/* SPWTDP - SpaceWire Time Distribution Protocol. The driver provides
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* device discovery and interrupt management.
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*
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* COPYRIGHT (c) 2017.
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* Cobham Gaisler AB
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <stddef.h>
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#include <rtems.h>
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#include <rtems/bspIo.h>
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#include <drvmgr/drvmgr.h>
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#include <grlib/ambapp.h>
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#include <grlib/ambapp_bus.h>
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#include <bsp.h>
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#include <grlib/spwtdp.h>
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#include <grlib/grlib_impl.h>
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/*#define STATIC*/
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#define STATIC static
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/*#define INLINE*/
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#define INLINE inline
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/*#define UNUSED*/
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#define UNUSED __attribute__((unused))
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#define DEBUG 1
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#ifdef DEBUG
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#define DBG(x...) printf(x)
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#else
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#define DBG(x...)
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#endif
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/* Memory and HW Registers Access routines. All 32-bit access routines */
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#define REG_WRITE(addr, val) \
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(*(volatile unsigned int *)(addr) = (unsigned int)(val))
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#define REG_READ(addr) (*(volatile unsigned int *)(addr))
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/*
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* Configuration register definitions
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* DEFINED in header
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*/
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/*
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* Control register definitions
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* DEFINED in header
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*/
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/*
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* TSTX Control register definitions
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*/
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#define TSTXCTRL_TSTC (0xff<<TSTXCTRL_TSTC_BIT)
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#define ETCTRL_PF (0xffff<<ETCTRL_PF_BIT)
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#define TSTXCTRL_TSTC_BIT 24
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#define ETCTRL_PF_BIT 0
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#define DEVNAME_LEN 11
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/* Private structure of SPWTDP driver. */
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struct spwtdp_priv {
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char devname[DEVNAME_LEN];
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struct drvmgr_dev *dev; /* Device */
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struct spwtdp_regs *regs;
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int open;
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int index;
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int initiator; /* Initiator configured */
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int target; /* Target configured */
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int freq; /* Frequency configured */
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/* Spin-lock ISR protection */
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SPIN_DECLARE(devlock);
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/* Driver semaphore */
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rtems_id sem;
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spwtdp_isr_t isr;
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void * isr_arg;
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};
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int spwtdp_count = 0;
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static struct spwtdp_priv *priv_tab[SPWTDP_MAX];
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STATIC void spwtdp_isr(void *data);
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STATIC int spwtdp_hw_reset(struct spwtdp_priv *priv);
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STATIC int spwtdp_init2(struct drvmgr_dev *dev);
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struct drvmgr_drv_ops spwtdp_ops =
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{
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{NULL, spwtdp_init2, NULL, NULL},
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NULL,
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NULL
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};
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struct amba_dev_id spwtdp_ids[] =
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{
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{VENDOR_GAISLER, GAISLER_SPWTDP},
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{0, 0} /* Mark end of table */
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};
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struct amba_drv_info spwtdp_drv_info =
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{
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{
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DRVMGR_OBJ_DRV, /* Driver */
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NULL, /* Next driver */
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NULL, /* Device list */
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DRIVER_AMBAPP_GAISLER_SPWTDP_ID,/* Driver ID */
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"SPWTDP_DRV", /* Driver Name */
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DRVMGR_BUS_TYPE_AMBAPP, /* Bus Type */
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&spwtdp_ops,
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NULL, /* Funcs */
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0, /* No devices yet */
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sizeof(struct spwtdp_priv), /* Let DrvMgr allocate priv */
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},
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&spwtdp_ids[0]
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};
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/* Register the SPWTDP Driver */
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void spwtdp_register_drv(void)
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{
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DBG("Registering SPWTDP driver\n");
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drvmgr_drv_register(&spwtdp_drv_info.general);
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}
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STATIC int spwtdp_init(struct spwtdp_priv *priv)
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{
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struct amba_dev_info *ainfo = priv->dev->businfo;
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struct ambapp_apb_info *apb;
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/* Get device information from AMBA PnP information */
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if (ainfo == NULL) {
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return -1;
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}
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apb = ainfo->info.apb_slv;
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priv->regs = (struct spwtdp_regs *)apb->start;
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spwtdp_hw_reset(priv);
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/* Only support 56 bits counter */
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if (REG_READ(&priv->regs->dat_ctrl) != 0x2f00) {
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DBG("SPWTDP only supports 56 bit precission counters.\n");
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return -1;
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}
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DBG("SPWTDP driver initialized\n");
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return 0;
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}
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/*** INTERFACE TO DRIVER MANAGER ***/
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STATIC int spwtdp_init2(struct drvmgr_dev *dev)
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{
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int status;
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struct spwtdp_priv *priv;
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DBG("SPWTDP[%d] on bus %s\n", dev->minor_drv, dev->parent->dev->name);
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if (spwtdp_count >= SPWTDP_MAX)
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return DRVMGR_ENORES;
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priv = dev->priv;
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if (priv == NULL)
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return DRVMGR_NOMEM;
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/* Register device */
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priv->dev = dev;
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priv->index = spwtdp_count;
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priv_tab[priv->index] = priv;
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snprintf(priv->devname, DEVNAME_LEN, "spwtdp%01u", priv->index);
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spwtdp_count++;
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/* Initialize Semaphore */
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if (rtems_semaphore_create(
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rtems_build_name('S', 'T', 'P', '0' + priv->index), 1,
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RTEMS_FIFO | RTEMS_SIMPLE_BINARY_SEMAPHORE | \
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RTEMS_NO_INHERIT_PRIORITY | RTEMS_LOCAL | \
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RTEMS_NO_PRIORITY_CEILING, 0, &priv->sem) != RTEMS_SUCCESSFUL) {
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priv->sem = RTEMS_ID_NONE;
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return DRVMGR_FAIL;
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}
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/* Initialize SPWTDP Hardware */
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status = spwtdp_init(priv);
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if (status) {
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printk("Failed to initialize spwtdp driver %d\n", status);
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return -1;
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}
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return DRVMGR_OK;
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}
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/* Hardware Reset of SPWTDP */
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STATIC int spwtdp_hw_reset(struct spwtdp_priv *priv)
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{
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int i = 1000;
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SPIN_IRQFLAGS(irqflags);
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SPIN_LOCK_IRQ(&priv->devlock, irqflags);
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/* Clear interrupts */
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REG_WRITE(&priv->regs->ists, SPWTDP_IRQ_WCLEAR);
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/* Reset the SPWTDP core */
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REG_WRITE(&priv->regs->conf[0], CONF0_RS);
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/* Wait for reset */
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while ((REG_READ(&priv->regs->conf[0]) & CONF0_RS) && (i > 0)) {
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i--;
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}
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SPIN_UNLOCK_IRQ(&priv->devlock, irqflags);
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return ((i > 0)? SPWTDP_ERR_OK : SPWTDP_ERR_ERROR);
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}
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int spwtdp_reset(void *spwtdp)
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{
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struct spwtdp_priv *priv = (struct spwtdp_priv *)spwtdp;
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/* Check priv and unregister isr */
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int ret = spwtdp_isr_unregister(spwtdp);
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if (ret != SPWTDP_ERR_OK)
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return ret;
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priv->initiator=0;
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priv->target=0;
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priv->freq=0;
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return spwtdp_hw_reset(priv);
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}
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void *spwtdp_open(int dev_no)
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{
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struct spwtdp_priv *priv;
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if (dev_no >= spwtdp_count)
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return NULL;
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/* Get Device */
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priv = priv_tab[dev_no];
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if ((priv == NULL)||(priv->open == 1)) {
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return NULL;
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}
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/* Set initial state of software */
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priv->open = 1;
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return priv;
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}
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int spwtdp_close(void *spwtdp)
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{
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struct spwtdp_priv *priv = (struct spwtdp_priv *)spwtdp;
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/* Check priv and reset core */
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int ret = spwtdp_reset(spwtdp);
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if (ret != SPWTDP_ERR_OK)
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return ret;
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priv->open = 0;
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return SPWTDP_ERR_OK;
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}
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int spwtdp_freq_setup(void *spwtdp, uint32_t fsinc, uint32_t cv, uint8_t etinc)
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{
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struct spwtdp_priv *priv = (struct spwtdp_priv *)spwtdp;
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/* Check priv */
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if (priv == NULL)
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return SPWTDP_ERR_NOINIT;
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if (priv->open == 0)
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return SPWTDP_ERR_EINVAL;
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/* Take SPWTDP lock - Wait until we get semaphore */
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if (rtems_semaphore_obtain(priv->sem, RTEMS_WAIT, RTEMS_NO_TIMEOUT)
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!= RTEMS_SUCCESSFUL)
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return SPWTDP_ERR_ERROR;
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REG_WRITE(&priv->regs->conf[1], fsinc & CONF1_FSINC);
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REG_WRITE(&priv->regs->conf[2],
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((cv<<CONF2_CV_BIT) & CONF2_CV) |
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((uint32_t)etinc & CONF2_ETINC));
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rtems_semaphore_release(priv->sem);
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priv->freq = 1;
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return SPWTDP_ERR_OK;
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}
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#define CONF0_INI_MASK (CONF0_EP|CONF0_ET|CONF0_SP|CONF0_SE|CONF0_LE| \
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CONF0_TD)
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int spwtdp_initiator_conf(void *spwtdp, uint8_t mapping, uint32_t options)
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{
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struct spwtdp_priv *priv = (struct spwtdp_priv *)spwtdp;
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/* Check priv */
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if (priv == NULL)
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return SPWTDP_ERR_NOINIT;
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if (priv->open == 0)
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return SPWTDP_ERR_EINVAL;
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/* Check if configured as target */
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if (priv->target == 1)
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return SPWTDP_ERR_EINVAL;
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/* Take SPWTDP lock - Wait until we get semaphore */
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if (rtems_semaphore_obtain(priv->sem, RTEMS_WAIT, RTEMS_NO_TIMEOUT)
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!= RTEMS_SUCCESSFUL)
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return SPWTDP_ERR_ERROR;
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unsigned int conf0 = REG_READ(&priv->regs->conf[0]);
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conf0 &= ~(CONF0_INI_MASK|CONF0_MAP);
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REG_WRITE(&priv->regs->conf[0],
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conf0 | (options & CONF0_INI_MASK) |
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(((uint32_t)mapping << CONF0_MAP_BIT) & CONF0_MAP));
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priv->initiator = 1;
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rtems_semaphore_release(priv->sem);
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return SPWTDP_ERR_OK;
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}
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#define CONF0_TAR_MASK (CONF0_JE|CONF0_ST|CONF0_EP|CONF0_ET|CONF0_SP| \
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CONF0_SE|CONF0_LE|CONF0_TD|CONF0_ME)
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int spwtdp_target_conf(void *spwtdp, uint8_t mapping, uint32_t options)
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{
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struct spwtdp_priv *priv = (struct spwtdp_priv *)spwtdp;
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/* Check priv */
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if (priv == NULL)
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return SPWTDP_ERR_NOINIT;
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if (priv->open == 0)
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return SPWTDP_ERR_EINVAL;
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/* Check if configured as initiator */
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if (priv->initiator == 1)
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return SPWTDP_ERR_EINVAL;
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/* Take SPWTDP lock - Wait until we get semaphore */
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if (rtems_semaphore_obtain(priv->sem, RTEMS_WAIT, RTEMS_NO_TIMEOUT)
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!= RTEMS_SUCCESSFUL)
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return SPWTDP_ERR_ERROR;
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unsigned int conf0 = REG_READ(&priv->regs->conf[0]);
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conf0 &= ~(CONF0_TAR_MASK|CONF0_MAP);
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REG_WRITE(&priv->regs->conf[0],
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conf0 | (options & CONF0_TAR_MASK) |
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(((uint32_t)mapping << CONF0_MAP_BIT) & CONF0_MAP));
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priv->initiator = 1;
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rtems_semaphore_release(priv->sem);
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return SPWTDP_ERR_OK;
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}
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int spwtdp_initiator_int_conf(void *spwtdp, uint8_t stm, uint8_t inrx,
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uint8_t intx)
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{
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struct spwtdp_priv *priv = (struct spwtdp_priv *)spwtdp;
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/* Check priv */
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if (priv == NULL)
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return SPWTDP_ERR_NOINIT;
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if (priv->open == 0)
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return SPWTDP_ERR_EINVAL;
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/* Check if configured as initiator */
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if (priv->initiator != 1)
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return SPWTDP_ERR_EINVAL;
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REG_WRITE(&priv->regs->conf[3],
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(((uint32_t)stm << CONF3_STM_BIT) & CONF3_STM) |
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(((uint32_t)inrx << CONF3_INRX_BIT) & CONF3_INRX) |
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(((uint32_t)intx << CONF3_INTX_BIT) & CONF3_INTX));
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return SPWTDP_ERR_OK;
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}
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int spwtdp_target_int_conf(void *spwtdp, uint8_t inrx, uint8_t intx,
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uint32_t options)
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{
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struct spwtdp_priv *priv = (struct spwtdp_priv *)spwtdp;
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/* Check priv */
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if (priv == NULL) {
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return SPWTDP_ERR_NOINIT;
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}
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if (priv->open == 0)
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return SPWTDP_ERR_EINVAL;
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/* Check if configured as target */
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if (priv->target != 1)
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return SPWTDP_ERR_EINVAL;
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REG_WRITE(&priv->regs->conf[3],
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(options & CONF3_DI) |
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(((uint32_t)inrx << CONF3_INRX_BIT) & CONF3_INRX) |
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(((uint32_t)intx << CONF3_INTX_BIT) & CONF3_INTX));
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return SPWTDP_ERR_OK;
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}
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int spwtdp_initiator_enable(void *spwtdp)
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{
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struct spwtdp_priv *priv = (struct spwtdp_priv *)spwtdp;
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/* Check priv */
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if (priv == NULL) {
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return SPWTDP_ERR_NOINIT;
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}
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if (priv->open == 0)
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return SPWTDP_ERR_EINVAL;
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/* Check if configured as initiator */
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if (priv->initiator != 1)
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return SPWTDP_ERR_EINVAL;
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/* Check if frequency is configured */
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if (priv->freq != 1)
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return SPWTDP_ERR_EINVAL;
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/* Take SPWTDP lock - Wait until we get semaphore */
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if (rtems_semaphore_obtain(priv->sem, RTEMS_WAIT, RTEMS_NO_TIMEOUT)
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!= RTEMS_SUCCESSFUL)
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return SPWTDP_ERR_ERROR;
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unsigned int conf0 = REG_READ(&priv->regs->conf[0]);
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REG_WRITE(&priv->regs->conf[0], conf0 | CONF0_TE);
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rtems_semaphore_release(priv->sem);
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return SPWTDP_ERR_OK;
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}
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int spwtdp_target_enable(void *spwtdp)
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{
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struct spwtdp_priv *priv = (struct spwtdp_priv *)spwtdp;
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/* Check priv */
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if (priv == NULL)
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return SPWTDP_ERR_NOINIT;
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if (priv->open == 0)
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return SPWTDP_ERR_EINVAL;
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/* Check if configured as target */
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if (priv->target != 1)
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return SPWTDP_ERR_EINVAL;
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/* Check if frequency is configured */
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if (priv->freq != 1)
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return SPWTDP_ERR_EINVAL;
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/* Take SPWTDP lock - Wait until we get semaphore */
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if (rtems_semaphore_obtain(priv->sem, RTEMS_WAIT, RTEMS_NO_TIMEOUT)
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!= RTEMS_SUCCESSFUL)
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return SPWTDP_ERR_ERROR;
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unsigned int conf0 = REG_READ(&priv->regs->conf[0]);
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REG_WRITE(&priv->regs->conf[0], conf0 | CONF0_RE);
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rtems_semaphore_release(priv->sem);
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return SPWTDP_ERR_OK;
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}
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int spwtdp_initiator_disable(void *spwtdp)
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{
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struct spwtdp_priv *priv = (struct spwtdp_priv *)spwtdp;
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/* Check priv */
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if (priv == NULL)
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return SPWTDP_ERR_NOINIT;
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if (priv->open == 0)
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return SPWTDP_ERR_EINVAL;
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/* Take SPWTDP lock - Wait until we get semaphore */
|
|
if (rtems_semaphore_obtain(priv->sem, RTEMS_WAIT, RTEMS_NO_TIMEOUT)
|
|
!= RTEMS_SUCCESSFUL)
|
|
return SPWTDP_ERR_ERROR;
|
|
|
|
unsigned int conf0 = REG_READ(&priv->regs->conf[0]);
|
|
REG_WRITE(&priv->regs->conf[0], conf0 & ~(CONF0_TE));
|
|
|
|
rtems_semaphore_release(priv->sem);
|
|
|
|
return SPWTDP_ERR_OK;
|
|
}
|
|
|
|
int spwtdp_target_disable(void *spwtdp)
|
|
{
|
|
struct spwtdp_priv *priv = (struct spwtdp_priv *)spwtdp;
|
|
|
|
/* Check priv */
|
|
if (priv == NULL)
|
|
return SPWTDP_ERR_NOINIT;
|
|
|
|
if (priv->open == 0)
|
|
return SPWTDP_ERR_EINVAL;
|
|
|
|
/* Take SPWTDP lock - Wait until we get semaphore */
|
|
if (rtems_semaphore_obtain(priv->sem, RTEMS_WAIT, RTEMS_NO_TIMEOUT)
|
|
!= RTEMS_SUCCESSFUL)
|
|
return SPWTDP_ERR_ERROR;
|
|
|
|
unsigned int conf0 = REG_READ(&priv->regs->conf[0]);
|
|
REG_WRITE(&priv->regs->conf[0], conf0 & ~(CONF0_RE));
|
|
|
|
rtems_semaphore_release(priv->sem);
|
|
|
|
return SPWTDP_ERR_OK;
|
|
}
|
|
|
|
/* Get and Clear status */
|
|
int spwtdp_status(void *spwtdp, uint32_t *sts, uint32_t clrmask)
|
|
{
|
|
struct spwtdp_priv *priv = (struct spwtdp_priv *)spwtdp;
|
|
|
|
if (priv == NULL) {
|
|
/* SPWTDP not initialized */
|
|
return SPWTDP_ERR_NOINIT;
|
|
}
|
|
|
|
unsigned int status = REG_READ(&priv->regs->stat[0]);
|
|
REG_WRITE(&priv->regs->stat[0], status & clrmask);
|
|
|
|
if (sts != NULL)
|
|
*sts = status;
|
|
|
|
return SPWTDP_ERR_OK;
|
|
}
|
|
|
|
/* Get and Clear interrupts */
|
|
int spwtdp_interrupt_status(void *spwtdp, uint32_t *sts, uint32_t clrmask)
|
|
{
|
|
struct spwtdp_priv *priv = (struct spwtdp_priv *)spwtdp;
|
|
SPIN_IRQFLAGS(irqflags);
|
|
|
|
if (priv == NULL) {
|
|
/* SPWTDP not initialized */
|
|
return SPWTDP_ERR_NOINIT;
|
|
}
|
|
|
|
SPIN_LOCK_IRQ(&priv->devlock, irqflags);
|
|
unsigned int status = REG_READ(&priv->regs->ists);
|
|
REG_WRITE(&priv->regs->ists, status & clrmask);
|
|
SPIN_UNLOCK_IRQ(&priv->devlock, irqflags);
|
|
|
|
if (sts != NULL)
|
|
*sts = status;
|
|
|
|
return SPWTDP_ERR_OK;
|
|
}
|
|
|
|
/* Unmask interrupts */
|
|
int spwtdp_interrupt_unmask(void *spwtdp, uint32_t irqmask)
|
|
{
|
|
struct spwtdp_priv *priv = (struct spwtdp_priv *)spwtdp;
|
|
|
|
if (priv == NULL) {
|
|
/* SPWTDP not initialized */
|
|
return SPWTDP_ERR_NOINIT;
|
|
}
|
|
|
|
if (priv->open == 0)
|
|
return SPWTDP_ERR_EINVAL;
|
|
|
|
unsigned int ctrl = REG_READ(&priv->regs->ien);
|
|
REG_WRITE(&priv->regs->ien, ctrl | irqmask);
|
|
|
|
return SPWTDP_ERR_OK;
|
|
}
|
|
|
|
/* Mask interrupts */
|
|
int spwtdp_interrupt_mask(void *spwtdp, uint32_t irqmask)
|
|
{
|
|
struct spwtdp_priv *priv = (struct spwtdp_priv *)spwtdp;
|
|
|
|
if (priv == NULL) {
|
|
/* SPWTDP not initialized */
|
|
return SPWTDP_ERR_NOINIT;
|
|
}
|
|
|
|
if (priv->open == 0)
|
|
return SPWTDP_ERR_EINVAL;
|
|
|
|
unsigned int ctrl = REG_READ(&priv->regs->ien);
|
|
REG_WRITE(&priv->regs->ien, ctrl & ~(irqmask));
|
|
|
|
return SPWTDP_ERR_OK;
|
|
}
|
|
|
|
int spwtdp_isr_register(void *spwtdp, spwtdp_isr_t func, void *data)
|
|
{
|
|
struct spwtdp_priv *priv = (struct spwtdp_priv *)spwtdp;
|
|
SPIN_ISR_IRQFLAGS(irqflags);
|
|
|
|
if (priv == NULL) {
|
|
/* SPWTDP not initialized */
|
|
return SPWTDP_ERR_NOINIT;
|
|
}
|
|
|
|
if (priv->open == 0)
|
|
return SPWTDP_ERR_EINVAL;
|
|
|
|
/* Check isr */
|
|
if (func == NULL) {
|
|
/* No ISR */
|
|
return SPWTDP_ERR_EINVAL;
|
|
}
|
|
|
|
priv->isr = func;
|
|
priv->isr_arg = data;
|
|
|
|
/* Register and Enable Interrupt at Interrupt controller */
|
|
drvmgr_interrupt_register(priv->dev, 0, "spwtdp", spwtdp_isr, priv);
|
|
|
|
/* Enable AMBA Interrupts */
|
|
SPIN_LOCK(&priv->devlock, irqflags);
|
|
unsigned int cfg0 = REG_READ(&priv->regs->conf[0]);
|
|
REG_WRITE(&priv->regs->conf[0], cfg0 | CONF0_AE);
|
|
SPIN_UNLOCK(&priv->devlock, irqflags);
|
|
|
|
return SPWTDP_ERR_OK;
|
|
}
|
|
|
|
int spwtdp_isr_unregister(void *spwtdp)
|
|
{
|
|
struct spwtdp_priv *priv = (struct spwtdp_priv *)spwtdp;
|
|
SPIN_ISR_IRQFLAGS(irqflags);
|
|
|
|
/* Disable IRQS (and check for priv!=NULL) */
|
|
int ret=spwtdp_interrupt_mask(spwtdp, SPWTDP_IRQ_WCLEAR);
|
|
if (ret != SPWTDP_ERR_OK)
|
|
return ret;
|
|
|
|
/* Disable AMBA Interrupts */
|
|
SPIN_LOCK(&priv->devlock, irqflags);
|
|
unsigned int cfg0 = REG_READ(&priv->regs->conf[0]);
|
|
REG_WRITE(&priv->regs->conf[0], cfg0 & ~(CONF0_AE));
|
|
SPIN_UNLOCK(&priv->devlock, irqflags);
|
|
|
|
/* Disable Interrupt at Interrupt controller */
|
|
drvmgr_interrupt_unregister(priv->dev, 0, spwtdp_isr, priv);
|
|
|
|
/* Unregister isr */
|
|
priv->isr = NULL;
|
|
priv->isr_arg = NULL;
|
|
|
|
return SPWTDP_ERR_OK;
|
|
}
|
|
|
|
STATIC void spwtdp_isr(void *arg)
|
|
{
|
|
struct spwtdp_priv *priv = arg;
|
|
unsigned int ists = REG_READ(&priv->regs->ists);
|
|
SPIN_ISR_IRQFLAGS(irqflags);
|
|
|
|
/* Return if the SPWTDP didn't generate the IRQ */
|
|
if (ists == 0)
|
|
return;
|
|
|
|
SPIN_LOCK(&priv->devlock, irqflags);
|
|
REG_WRITE(&priv->regs->ists, ists); /* clear handled interrupt events */
|
|
SPIN_UNLOCK(&priv->devlock, irqflags);
|
|
|
|
/* Let user Handle Interrupt */
|
|
if (priv->isr!=NULL)
|
|
priv->isr(ists, priv->isr_arg);
|
|
|
|
return;
|
|
}
|
|
|
|
int spwtdp_dat_et_get(void * spwtdp, spwtdp_time_t * val)
|
|
{
|
|
struct spwtdp_priv *priv = (struct spwtdp_priv *)spwtdp;
|
|
|
|
if (priv == NULL) {
|
|
/* SPWTDP not initialized */
|
|
return SPWTDP_ERR_NOINIT;
|
|
}
|
|
|
|
if (priv->open == 0)
|
|
return SPWTDP_ERR_EINVAL;
|
|
|
|
/* Check pointer */
|
|
if (val == NULL) {
|
|
return SPWTDP_ERR_EINVAL;
|
|
}
|
|
|
|
val->preamble = REG_READ(&priv->regs->dat_ctrl) & ETCTRL_PF;
|
|
unsigned int * buffer = (unsigned int *) val->data;
|
|
buffer[0] = REG_READ(&priv->regs->dat_et[0]);
|
|
buffer[1] = REG_READ(&priv->regs->dat_et[1]);
|
|
buffer[2] = REG_READ(&priv->regs->dat_et[2]);
|
|
buffer[3] = REG_READ(&priv->regs->dat_et[3]);
|
|
buffer[4] = REG_READ(&priv->regs->dat_et[4]);
|
|
|
|
return SPWTDP_ERR_OK;
|
|
}
|
|
|
|
int spwtdp_tsrx_et_get(void * spwtdp, spwtdp_time_t * val)
|
|
{
|
|
struct spwtdp_priv *priv = (struct spwtdp_priv *)spwtdp;
|
|
|
|
if (priv == NULL) {
|
|
/* SPWTDP not initialized */
|
|
return SPWTDP_ERR_NOINIT;
|
|
}
|
|
|
|
if (priv->open == 0)
|
|
return SPWTDP_ERR_EINVAL;
|
|
|
|
/* Check pointer */
|
|
if (val == NULL) {
|
|
return SPWTDP_ERR_EINVAL;
|
|
}
|
|
|
|
val->preamble = REG_READ(&priv->regs->ts_rx_ctrl) & ETCTRL_PF;
|
|
unsigned int * buffer = (unsigned int *) val->data;
|
|
buffer[0] = REG_READ(&priv->regs->ts_rx_et[0]);
|
|
buffer[1] = REG_READ(&priv->regs->ts_rx_et[1]);
|
|
buffer[2] = REG_READ(&priv->regs->ts_rx_et[2]);
|
|
buffer[3] = REG_READ(&priv->regs->ts_rx_et[3]);
|
|
buffer[4] = REG_READ(&priv->regs->ts_rx_et[4]);
|
|
|
|
return SPWTDP_ERR_OK;
|
|
}
|
|
|
|
int spwtdp_tstx_et_get(void * spwtdp, spwtdp_time_t * val)
|
|
{
|
|
struct spwtdp_priv *priv = (struct spwtdp_priv *)spwtdp;
|
|
|
|
if (priv == NULL) {
|
|
/* SPWTDP not initialized */
|
|
return SPWTDP_ERR_NOINIT;
|
|
}
|
|
|
|
if (priv->open == 0)
|
|
return SPWTDP_ERR_EINVAL;
|
|
|
|
/* Check pointer */
|
|
if (val == NULL) {
|
|
return SPWTDP_ERR_EINVAL;
|
|
}
|
|
|
|
val->preamble = REG_READ(&priv->regs->ts_tx_ctrl) & ETCTRL_PF;
|
|
unsigned int * buffer = (unsigned int *) val->data;
|
|
buffer[0] = REG_READ(&priv->regs->ts_tx_et[0]);
|
|
buffer[1] = REG_READ(&priv->regs->ts_tx_et[1]);
|
|
buffer[2] = REG_READ(&priv->regs->ts_tx_et[2]);
|
|
buffer[3] = REG_READ(&priv->regs->ts_tx_et[3]);
|
|
buffer[4] = REG_READ(&priv->regs->ts_tx_et[4]);
|
|
|
|
return SPWTDP_ERR_OK;
|
|
}
|
|
|
|
int spwtdp_lat_et_get(void * spwtdp, spwtdp_time_t * val)
|
|
{
|
|
struct spwtdp_priv *priv = (struct spwtdp_priv *)spwtdp;
|
|
|
|
if (priv == NULL) {
|
|
/* SPWTDP not initialized */
|
|
return SPWTDP_ERR_NOINIT;
|
|
}
|
|
|
|
if (priv->open == 0)
|
|
return SPWTDP_ERR_EINVAL;
|
|
|
|
/* Check pointer */
|
|
if (val == NULL) {
|
|
return SPWTDP_ERR_EINVAL;
|
|
}
|
|
|
|
val->preamble = REG_READ(&priv->regs->lat_ctrl) & ETCTRL_PF;
|
|
unsigned int * buffer = (unsigned int *) val->data;
|
|
buffer[0] = REG_READ(&priv->regs->lat_et[0]);
|
|
buffer[1] = REG_READ(&priv->regs->lat_et[1]);
|
|
buffer[2] = REG_READ(&priv->regs->lat_et[2]);
|
|
buffer[3] = REG_READ(&priv->regs->lat_et[3]);
|
|
buffer[4] = REG_READ(&priv->regs->lat_et[4]);
|
|
|
|
return SPWTDP_ERR_OK;
|
|
}
|
|
|
|
int spwtdp_cmd_et_get(void * spwtdp, spwtdp_time_t * val)
|
|
{
|
|
struct spwtdp_priv *priv = (struct spwtdp_priv *)spwtdp;
|
|
|
|
if (priv == NULL) {
|
|
/* SPWTDP not initialized */
|
|
return SPWTDP_ERR_NOINIT;
|
|
}
|
|
|
|
if (priv->open == 0)
|
|
return SPWTDP_ERR_EINVAL;
|
|
|
|
/* Check pointer */
|
|
if (val == NULL) {
|
|
return SPWTDP_ERR_EINVAL;
|
|
}
|
|
|
|
val->preamble = REG_READ(&priv->regs->cmd_ctrl) & ETCTRL_PF;
|
|
unsigned int * buffer = (unsigned int *) val->data;
|
|
buffer[0] = REG_READ(&priv->regs->cmd_et[0]);
|
|
buffer[1] = REG_READ(&priv->regs->cmd_et[1]);
|
|
buffer[2] = REG_READ(&priv->regs->cmd_et[2]);
|
|
buffer[3] = REG_READ(&priv->regs->cmd_et[3]);
|
|
buffer[4] = REG_READ(&priv->regs->cmd_et[4]);
|
|
|
|
return SPWTDP_ERR_OK;
|
|
}
|
|
|
|
int spwtdp_initiator_tstx_conf(void * spwtdp, uint8_t tstc)
|
|
{
|
|
struct spwtdp_priv *priv = (struct spwtdp_priv *)spwtdp;
|
|
|
|
if (priv == NULL) {
|
|
/* SPWTDP not initialized */
|
|
return SPWTDP_ERR_NOINIT;
|
|
}
|
|
|
|
if (priv->open == 0)
|
|
return SPWTDP_ERR_EINVAL;
|
|
|
|
/* Check if configured as initiator */
|
|
if (priv->initiator != 1)
|
|
return SPWTDP_ERR_EINVAL;
|
|
|
|
REG_WRITE(&priv->regs->ts_tx_ctrl,
|
|
(((uint32_t)tstc) << TSTXCTRL_TSTC_BIT) & TSTXCTRL_TSTC);
|
|
|
|
return SPWTDP_ERR_OK;
|
|
}
|
|
|
|
int spwtdp_initiator_cmd_et_set(void *spwtdp, spwtdp_time_t val)
|
|
{
|
|
struct spwtdp_priv *priv = (struct spwtdp_priv *)spwtdp;
|
|
|
|
if (priv == NULL) {
|
|
/* SPWTDP not initialized */
|
|
return SPWTDP_ERR_NOINIT;
|
|
}
|
|
|
|
if (priv->open == 0)
|
|
return SPWTDP_ERR_EINVAL;
|
|
|
|
/* Check if configured as initiator */
|
|
if (priv->initiator != 1)
|
|
return SPWTDP_ERR_EINVAL;
|
|
|
|
unsigned int * buffer = (unsigned int *) val.data;
|
|
REG_WRITE(&priv->regs->lat_et[0], buffer[0]);
|
|
REG_WRITE(&priv->regs->lat_et[1], buffer[1]);
|
|
REG_WRITE(&priv->regs->lat_et[2], buffer[2]);
|
|
REG_WRITE(&priv->regs->lat_et[3], buffer[3]);
|
|
REG_WRITE(&priv->regs->lat_et[4], buffer[4]);
|
|
|
|
|
|
/* Take SPWTDP lock - Wait until we get semaphore */
|
|
if (rtems_semaphore_obtain(priv->sem, RTEMS_WAIT, RTEMS_NO_TIMEOUT)
|
|
!= RTEMS_SUCCESSFUL)
|
|
return SPWTDP_ERR_ERROR;
|
|
|
|
/* Signal new command */
|
|
unsigned int ctrl = REG_READ(&priv->regs->cmd_ctrl);
|
|
REG_WRITE(&priv->regs->cmd_ctrl, ctrl | CTRL_NC);
|
|
|
|
rtems_semaphore_release(priv->sem);
|
|
|
|
return SPWTDP_ERR_OK;
|
|
}
|
|
|
|
int spwtdp_initiator_cmd_spwtc_set(void *spwtdp, uint8_t spwtc)
|
|
{
|
|
struct spwtdp_priv *priv = (struct spwtdp_priv *)spwtdp;
|
|
|
|
if (priv == NULL) {
|
|
/* SPWTDP not initialized */
|
|
return SPWTDP_ERR_NOINIT;
|
|
}
|
|
|
|
if (priv->open == 0)
|
|
return SPWTDP_ERR_EINVAL;
|
|
|
|
/* Check if configured as initiator */
|
|
if (priv->initiator != 1)
|
|
return SPWTDP_ERR_EINVAL;
|
|
|
|
/* Take SPWTDP lock - Wait until we get semaphore */
|
|
if (rtems_semaphore_obtain(priv->sem, RTEMS_WAIT, RTEMS_NO_TIMEOUT)
|
|
!= RTEMS_SUCCESSFUL)
|
|
return SPWTDP_ERR_ERROR;
|
|
|
|
unsigned int ctrl = (REG_READ(&priv->regs->cmd_ctrl) &~ CTRL_SPWTC);
|
|
REG_WRITE(&priv->regs->cmd_ctrl,
|
|
ctrl | (((uint32_t)spwtc << CTRL_SPWTC_BIT) & CTRL_SPWTC));
|
|
|
|
rtems_semaphore_release(priv->sem);
|
|
|
|
return SPWTDP_ERR_OK;
|
|
}
|
|
|
|
#define CTRL_TAR_MASK (CTRL_NC|CTRL_IS)
|
|
int spwtdp_target_cmd_conf(void *spwtdp, uint8_t spwtc, uint16_t cpf,
|
|
uint32_t options)
|
|
{
|
|
struct spwtdp_priv *priv = (struct spwtdp_priv *)spwtdp;
|
|
|
|
if (priv == NULL) {
|
|
/* SPWTDP not initialized */
|
|
return SPWTDP_ERR_NOINIT;
|
|
}
|
|
|
|
if (priv->open == 0)
|
|
return SPWTDP_ERR_EINVAL;
|
|
|
|
/* Check if configured as target */
|
|
if (priv->target != 1)
|
|
return SPWTDP_ERR_EINVAL;
|
|
|
|
/* Take SPWTDP lock - Wait until we get semaphore */
|
|
if (rtems_semaphore_obtain(priv->sem, RTEMS_WAIT, RTEMS_NO_TIMEOUT)
|
|
!= RTEMS_SUCCESSFUL)
|
|
return SPWTDP_ERR_ERROR;
|
|
|
|
REG_WRITE(&priv->regs->cmd_ctrl,
|
|
(options & CTRL_TAR_MASK) |
|
|
((cpf << CTRL_CPF_BIT) & CTRL_CPF) |
|
|
(((uint32_t)spwtc << CTRL_SPWTC_BIT) & CTRL_SPWTC));
|
|
|
|
rtems_semaphore_release(priv->sem);
|
|
|
|
return SPWTDP_ERR_OK;
|
|
}
|
|
|
|
int spwtdp_precision_get(void *spwtdp, uint8_t *fine, uint8_t *coarse)
|
|
{
|
|
struct spwtdp_priv *priv = (struct spwtdp_priv *)spwtdp;
|
|
int coarse_precision, fine_precision;
|
|
|
|
if (priv == NULL) {
|
|
/* SPWTDP not initialized */
|
|
return SPWTDP_ERR_NOINIT;
|
|
}
|
|
|
|
if (priv->open == 0)
|
|
return SPWTDP_ERR_EINVAL;
|
|
|
|
unsigned int preamble = REG_READ(&priv->regs->dat_ctrl);
|
|
|
|
if (preamble & 0x80) {
|
|
DBG("Pfield second extension set: unknown format");
|
|
return SPWTDP_ERR_ERROR;
|
|
}
|
|
if (!((preamble & 0x7000) == 0x2000 || (preamble & 0x7000) == 0x1000)) {
|
|
DBG(" PField indicates not unsegmented code: unknown format");
|
|
return SPWTDP_ERR_ERROR;
|
|
}
|
|
/*
|
|
* coarse_precision = 32;
|
|
* fine_precision = 24;
|
|
*/
|
|
coarse_precision = ((preamble >> 10) & 0x3) + 1;
|
|
if (preamble & 0x80)
|
|
coarse_precision += (preamble >> 5) & 0x3;
|
|
fine_precision = (preamble >> 8) & 0x3;
|
|
if (preamble & 0x80)
|
|
fine_precision += (preamble >> 2) & 0x7;
|
|
if (coarse!=NULL)
|
|
*coarse = coarse_precision;
|
|
if (fine!=NULL)
|
|
*fine = fine_precision;
|
|
|
|
return SPWTDP_ERR_OK;
|
|
}
|
|
|