forked from Imagelibrary/rtems
5d5b9eeb08
This patch changes the license to BSD-2 for all source files where the copyright is held by Aeroflex Gaisler, Cobham Gaisler, or Gaisler Research. Some files also includes copyright right statements from OAR and/or embedded Brains in addition to Gaisler. Updates #3053.
617 lines
16 KiB
C
617 lines
16 KiB
C
/* SPDX-License-Identifier: BSD-2-Clause */
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/* GR-TMTC-1553 PCI Target driver.
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*
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* COPYRIGHT (c) 2008.
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* Cobham Gaisler AB.
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*
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* Configures the GR-TMTC-1553 interface PCI board.
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* This driver provides a AMBA PnP bus by using the general part
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* of the AMBA PnP bus driver (ambapp_bus.c).
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*
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* Driver resources for the AMBA PnP bus provided can be set using
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* gr_tmtc_1553_set_resources().
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <inttypes.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <sys/types.h>
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#include <sys/stat.h>
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#include <bsp.h>
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#include <rtems/bspIo.h>
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#include <pci.h>
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#include <pci/access.h>
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#include <grlib/ambapp.h>
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#include <grlib/grlib.h>
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#include <drvmgr/drvmgr.h>
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#include <grlib/ambapp_bus.h>
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#include <drvmgr/pci_bus.h>
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#include <grlib/bspcommon.h>
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#include <grlib/genirq.h>
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#include <grlib/gr_tmtc_1553.h>
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#include <grlib/grlib_impl.h>
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/*#define DEBUG 1 */
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#ifdef DEBUG
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#define DBG(x...) printk(x)
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#else
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#define DBG(x...)
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#endif
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/* PCI ID */
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#define PCIID_VENDOR_GAISLER 0x1AC8
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int gr_tmtc_1553_init1(struct drvmgr_dev *dev);
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int gr_tmtc_1553_init2(struct drvmgr_dev *dev);
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void gr_tmtc_1553_isr (void *arg);
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struct gr_tmtc_1553_ver {
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const unsigned int amba_freq_hz; /* The frequency */
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const unsigned int amba_ioarea; /* The address where the PnP IOAREA starts at */
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};
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/* Private data structure for driver */
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struct gr_tmtc_1553_priv {
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/* Driver management */
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struct drvmgr_dev *dev;
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char prefix[32];
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SPIN_DECLARE(devlock);
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/* PCI */
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pci_dev_t pcidev;
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struct pci_dev_info *devinfo;
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/* IRQ */
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genirq_t genirq;
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struct gr_tmtc_1553_ver *version;
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struct irqmp_regs *irq;
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struct drvmgr_map_entry bus_maps_down[2];
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struct ambapp_bus abus;
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struct ambapp_mmap amba_maps[4];
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struct ambapp_config config;
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};
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struct gr_tmtc_1553_ver gr_tmtc_1553_ver0 = {
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.amba_freq_hz = 33333333,
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.amba_ioarea = 0xfff00000,
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};
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int ambapp_tmtc_1553_int_register(
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struct drvmgr_dev *dev,
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int irq,
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const char *info,
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drvmgr_isr handler,
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void *arg);
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int ambapp_tmtc_1553_int_unregister(
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struct drvmgr_dev *dev,
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int irq,
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drvmgr_isr handler,
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void *arg);
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int ambapp_tmtc_1553_int_unmask(
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struct drvmgr_dev *dev,
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int irq);
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int ambapp_tmtc_1553_int_mask(
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struct drvmgr_dev *dev,
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int irq);
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int ambapp_tmtc_1553_int_clear(
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struct drvmgr_dev *dev,
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int irq);
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int ambapp_tmtc_1553_get_params(
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struct drvmgr_dev *dev,
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struct drvmgr_bus_params *params);
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struct ambapp_ops ambapp_tmtc_1553_ops = {
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.int_register = ambapp_tmtc_1553_int_register,
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.int_unregister = ambapp_tmtc_1553_int_unregister,
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.int_unmask = ambapp_tmtc_1553_int_unmask,
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.int_mask = ambapp_tmtc_1553_int_mask,
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.int_clear = ambapp_tmtc_1553_int_clear,
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.get_params = ambapp_tmtc_1553_get_params
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};
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struct drvmgr_drv_ops gr_tmtc_1553_ops =
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{
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{gr_tmtc_1553_init1, gr_tmtc_1553_init2, NULL, NULL},
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NULL,
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NULL
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};
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struct pci_dev_id_match gr_tmtc_1553_ids[] =
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{
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PCIID_DEVVEND(PCIID_VENDOR_GAISLER, PCIID_DEVICE_GR_TMTC_1553),
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PCIID_END_TABLE /* Mark end of table */
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};
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struct pci_drv_info gr_tmtc_1553_info =
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{
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{
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DRVMGR_OBJ_DRV, /* Driver */
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NULL, /* Next driver */
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NULL, /* Device list */
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DRIVER_PCI_GAISLER_TMTC_1553_ID, /* Driver ID */
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"GR-TMTC-1553_DRV", /* Driver Name */
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DRVMGR_BUS_TYPE_PCI, /* Bus Type */
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&gr_tmtc_1553_ops,
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NULL, /* Funcs */
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0, /* No devices yet */
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0,
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},
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&gr_tmtc_1553_ids[0]
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};
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/* Driver resources configuration for the AMBA bus on the GR-RASTA-IO board.
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* It is declared weak so that the user may override it from the project file,
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* if the default settings are not enough.
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*
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* The configuration consists of an array of configuration pointers, each
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* pointer determine the configuration of one GR-RASTA-IO board. Pointer
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* zero is for board0, pointer 1 for board1 and so on.
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*
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* The array must end with a NULL pointer.
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*/
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struct drvmgr_bus_res *gr_tmtc_1553_resources[] __attribute__((weak)) =
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{
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NULL
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};
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void gr_tmtc_1553_register_drv(void)
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{
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DBG("Registering GR-TMTC-1553 PCI driver\n");
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drvmgr_drv_register(&gr_tmtc_1553_info.general);
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}
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void gr_tmtc_1553_isr (void *arg)
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{
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struct gr_tmtc_1553_priv *priv = arg;
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unsigned int status, tmp;
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int irq;
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SPIN_ISR_IRQFLAGS(irqflags);
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tmp = status = priv->irq->ipend;
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/* DBG("GR-RASTA-IO: IRQ 0x%x\n",status); */
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SPIN_LOCK(&priv->devlock, irqflags);
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for(irq=0; irq<16; irq++) {
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if ( status & (1<<irq) ) {
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genirq_doirq(priv->genirq, irq);
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priv->irq->iclear = (1<<irq);
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status &= ~(1<<irq);
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if ( status == 0 )
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break;
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}
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}
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SPIN_UNLOCK(&priv->devlock, irqflags);
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/* ACK interrupt, this is because PCI is Level, so the IRQ Controller still drives the IRQ. */
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if ( tmp )
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drvmgr_interrupt_clear(priv->dev, 0);
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DBG("GR-TMTC-1553-IRQ: 0x%x\n", tmp);
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}
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static int gr_tmtc_1553_hw_init(struct gr_tmtc_1553_priv *priv)
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{
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unsigned int *page0 = NULL;
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struct ambapp_dev *tmp;
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unsigned int pci_freq_hz;
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struct pci_dev_info *devinfo = priv->devinfo;
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uint32_t bar0, bar0_size;
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/* Select version of GR-TMTC-1553 board */
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switch (devinfo->rev) {
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case 0:
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priv->version = &gr_tmtc_1553_ver0;
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break;
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default:
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return -2;
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}
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bar0 = devinfo->resources[0].address;
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bar0_size = devinfo->resources[0].size;
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page0 = (unsigned int *)(bar0 + bar0_size/2);
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/* Point PAGE0 to start of board address map. RAM at 0xff000000, APB at 0xffc00000, IOAREA at 0xfff000000 */
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/* XXX We assume little endian host with byte twisting enabled here */
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*page0 = 0x010000ff; /* Set little endian mode on peripheral. */
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/* Scan AMBA Plug&Play */
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/* AMBA MAP bar0 (in CPU) ==> 0x80000000(remote amba address) */
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priv->amba_maps[0].size = 0x1000000;
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priv->amba_maps[0].local_adr = bar0;
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priv->amba_maps[0].remote_adr = 0xff000000;
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/* Addresses not matching with map be untouched */
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priv->amba_maps[2].size = 0xfffffff0;
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priv->amba_maps[2].local_adr = 0;
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priv->amba_maps[2].remote_adr = 0;
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/* Mark end of table */
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priv->amba_maps[3].size=0;
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priv->amba_maps[3].local_adr = 0;
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priv->amba_maps[3].remote_adr = 0;
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/* Start AMBA PnP scan at first AHB bus */
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ambapp_scan(&priv->abus,
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bar0 + (priv->version->amba_ioarea & ~0xff000000),
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NULL, &priv->amba_maps[0]);
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/* Frequency is the hsame as the PCI bus frequency */
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drvmgr_freq_get(priv->dev, 0, &pci_freq_hz);
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ambapp_freq_init(&priv->abus, NULL, pci_freq_hz);
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/* Find IRQ controller */
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tmp = (struct ambapp_dev *)ambapp_for_each(&priv->abus,
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(OPTIONS_ALL|OPTIONS_APB_SLVS),
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VENDOR_GAISLER, GAISLER_IRQMP,
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ambapp_find_by_idx, NULL);
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if ( !tmp ) {
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return -4;
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}
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priv->irq = (struct irqmp_regs *)DEV_TO_APB(tmp)->start;
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/* Set up irq controller */
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priv->irq->mask[0] = 0;
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priv->irq->iclear = 0xffff;
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priv->irq->ilevel = 0;
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/* DOWN streams translation table */
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priv->bus_maps_down[0].name = "PCI BAR0 -> AMBA";
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priv->bus_maps_down[0].size = priv->amba_maps[0].size;
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priv->bus_maps_down[0].from_adr = (void *)priv->amba_maps[0].local_adr;
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priv->bus_maps_down[0].to_adr = (void *)priv->amba_maps[0].remote_adr;
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/* Mark end of translation table */
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priv->bus_maps_down[1].size = 0;
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/* Successfully registered the board */
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return 0;
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}
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/* Called when a PCI target is found with the PCI device and vendor ID
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* given in gr_tmtc_1553_ids[].
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*/
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int gr_tmtc_1553_init1(struct drvmgr_dev *dev)
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{
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struct gr_tmtc_1553_priv *priv;
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struct pci_dev_info *devinfo;
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int status;
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uint32_t bar0, bar0_size;
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int resources_cnt;
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int sc;
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/* PCI device does not have the IRQ line register, when PCI autoconf configures it the configuration
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* is forgotten. We take the IRQ number from the PCI Host device (AMBA device), this works as long
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* as PCI-IRQs are ored together on the bus.
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*
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* Note that this only works on LEON.
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*/
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((struct pci_dev_info *)dev->businfo)->irq = ((struct amba_dev_info *)dev->parent->dev->businfo)->info.irq;
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priv = grlib_calloc(1, sizeof(*priv));
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if ( !priv )
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return DRVMGR_NOMEM;
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dev->priv = priv;
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priv->dev = dev;
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/* Determine number of configurations */
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resources_cnt = get_resarray_count(gr_tmtc_1553_resources);
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/* Generate Device prefix */
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strcpy(priv->prefix, "/dev/tmtc1553_0");
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priv->prefix[14] += dev->minor_drv;
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sc = mkdir(priv->prefix, S_IRWXU | S_IRWXG | S_IRWXO);
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_Assert_Unused_variable_equals(sc, 0);
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priv->prefix[15] = '/';
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priv->prefix[16] = '\0';
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priv->devinfo = devinfo = (struct pci_dev_info *)dev->businfo;
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priv->pcidev = devinfo->pcidev;
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bar0 = devinfo->resources[0].address;
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bar0_size = devinfo->resources[0].size;
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printk("\n\n--- GR-TMTC-1553[%d] ---\n", dev->minor_drv);
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printk(" PCI BUS: 0x%x, SLOT: 0x%x, FUNCTION: 0x%x\n",
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PCI_DEV_EXPAND(priv->pcidev));
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printk(" PCI VENDOR: 0x%04x, DEVICE: 0x%04x\n",
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devinfo->id.vendor, devinfo->id.device);
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printk(" PCI BAR[0]: 0x%" PRIx32 " - 0x%" PRIx32 "\n",
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bar0, bar0 + bar0_size - 1);
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printk(" IRQ: %d\n\n\n", devinfo->irq);
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/* all neccessary space assigned to GR-TMTC-1553 target? */
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if (bar0_size == 0)
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return DRVMGR_ENORES;
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/* Initialize spin-lock for this PCI peripheral device. This is to
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* protect the Interrupt Controller Registers. The genirq layer is
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* protecting its own internals and ISR dispatching.
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*/
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SPIN_INIT(&priv->devlock, priv->prefix);
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priv->genirq = genirq_init(16);
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if ( priv->genirq == NULL ) {
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free(priv);
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dev->priv = NULL;
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return DRVMGR_FAIL;
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}
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status = gr_tmtc_1553_hw_init(priv);
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if ( status != 0 ) {
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genirq_destroy(priv->genirq);
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free(priv);
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dev->priv = NULL;
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printk(" Failed to initialize GR-TMTC-1553 HW: %d\n", status);
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return DRVMGR_FAIL;
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}
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/* Init amba bus */
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priv->config.abus = &priv->abus;
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priv->config.ops = &ambapp_tmtc_1553_ops;
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priv->config.maps_down = &priv->bus_maps_down[0];
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/* This PCI device has only target interface so DMA is not supported,
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* which means that translation from AMBA->PCI should fail if attempted.
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*/
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priv->config.maps_up = DRVMGR_TRANSLATE_NO_BRIDGE;
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if ( priv->dev->minor_drv < resources_cnt ) {
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priv->config.resources = gr_tmtc_1553_resources[priv->dev->minor_drv];
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} else {
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priv->config.resources = NULL;
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}
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/* Create And Register AMBA PnP Bus */
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return ambapp_bus_register(dev, &priv->config);
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}
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int gr_tmtc_1553_init2(struct drvmgr_dev *dev)
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{
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struct gr_tmtc_1553_priv *priv = dev->priv;
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/* Clear any old interrupt requests */
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drvmgr_interrupt_clear(dev, 0);
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/* Enable System IRQ so that GR-TMTC-1553 PCI target interrupt goes through.
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*
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* It is important to enable it in stage init2. If interrupts were enabled in init1
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* this might hang the system when more than one PCI target is connected, this is
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* because PCI interrupts might be shared and PCI target 2 have not initialized and
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* might therefore drive interrupt already when entering init1().
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*/
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drvmgr_interrupt_register(
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dev,
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0,
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"gr_tmtc_1553",
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gr_tmtc_1553_isr,
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(void *)priv);
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return DRVMGR_OK;
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}
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int ambapp_tmtc_1553_int_register(
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struct drvmgr_dev *dev,
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int irq,
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const char *info,
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drvmgr_isr handler,
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void *arg)
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{
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struct gr_tmtc_1553_priv *priv = dev->parent->dev->priv;
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SPIN_IRQFLAGS(irqflags);
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int status;
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void *h;
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h = genirq_alloc_handler(handler, arg);
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if ( h == NULL )
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return DRVMGR_FAIL;
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SPIN_LOCK_IRQ(&priv->devlock, irqflags);
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status = genirq_register(priv->genirq, irq, h);
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if ( status == 0 ) {
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/* Disable and clear IRQ for first registered handler */
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priv->irq->iclear = (1<<irq);
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priv->irq->mask[0] &= ~(1<<irq); /* mask interrupt source */
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} else if ( status == 1 )
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status = 0;
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if (status != 0) {
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SPIN_UNLOCK_IRQ(&priv->devlock, irqflags);
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genirq_free_handler(h);
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return DRVMGR_FAIL;
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}
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status = genirq_enable(priv->genirq, irq, handler, arg);
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if ( status == 0 ) {
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/* Enable IRQ for first enabled handler only */
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priv->irq->mask[0] |= (1<<irq); /* unmask interrupt source */
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} else if ( status == 1 )
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status = 0;
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SPIN_UNLOCK_IRQ(&priv->devlock, irqflags);
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return status;
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}
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int ambapp_tmtc_1553_int_unregister(
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struct drvmgr_dev *dev,
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int irq,
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drvmgr_isr isr,
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void *arg)
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{
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struct gr_tmtc_1553_priv *priv = dev->parent->dev->priv;
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SPIN_IRQFLAGS(irqflags);
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int status;
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void *handler;
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SPIN_LOCK_IRQ(&priv->devlock, irqflags);
|
|
|
|
status = genirq_disable(priv->genirq, irq, isr, arg);
|
|
if ( status == 0 ) {
|
|
/* Disable IRQ only when no enabled handler exists */
|
|
priv->irq->mask[0] &= ~(1<<irq); /* mask interrupt source */
|
|
} else if ( status == 1 )
|
|
status = 0;
|
|
|
|
handler = genirq_unregister(priv->genirq, irq, isr, arg);
|
|
if ( handler == NULL )
|
|
status = DRVMGR_FAIL;
|
|
else
|
|
status = DRVMGR_OK;
|
|
|
|
SPIN_UNLOCK_IRQ(&priv->devlock, irqflags);
|
|
|
|
if (handler)
|
|
genirq_free_handler(handler);
|
|
|
|
return status;
|
|
}
|
|
|
|
int ambapp_tmtc_1553_int_unmask(
|
|
struct drvmgr_dev *dev,
|
|
int irq)
|
|
{
|
|
struct gr_tmtc_1553_priv *priv = dev->parent->dev->priv;
|
|
SPIN_IRQFLAGS(irqflags);
|
|
|
|
DBG("TMTC-1553 IRQ %d: enable\n", irq);
|
|
|
|
if ( genirq_check(priv->genirq, irq) )
|
|
return DRVMGR_FAIL;
|
|
|
|
SPIN_LOCK_IRQ(&priv->devlock, irqflags);
|
|
|
|
/* Enable IRQ */
|
|
priv->irq->mask[0] |= (1<<irq); /* unmask interrupt source */
|
|
|
|
SPIN_UNLOCK_IRQ(&priv->devlock, irqflags);
|
|
|
|
return DRVMGR_OK;
|
|
}
|
|
|
|
int ambapp_tmtc_1553_int_mask(
|
|
struct drvmgr_dev *dev,
|
|
int irq)
|
|
{
|
|
struct gr_tmtc_1553_priv *priv = dev->parent->dev->priv;
|
|
SPIN_IRQFLAGS(irqflags);
|
|
|
|
DBG("TMTC-1553 IRQ %d: disable\n", irq);
|
|
|
|
if ( genirq_check(priv->genirq, irq) )
|
|
return DRVMGR_FAIL;
|
|
|
|
SPIN_LOCK_IRQ(&priv->devlock, irqflags);
|
|
|
|
/* Disable IRQ */
|
|
priv->irq->mask[0] &= ~(1<<irq); /* mask interrupt source */
|
|
|
|
SPIN_UNLOCK_IRQ(&priv->devlock, irqflags);
|
|
|
|
return DRVMGR_OK;
|
|
}
|
|
|
|
int ambapp_tmtc_1553_int_clear(
|
|
struct drvmgr_dev *dev,
|
|
int irq)
|
|
{
|
|
struct gr_tmtc_1553_priv *priv = dev->parent->dev->priv;
|
|
|
|
if ( genirq_check(priv->genirq, irq) )
|
|
return DRVMGR_FAIL;
|
|
|
|
priv->irq->iclear = (1<<irq);
|
|
|
|
return DRVMGR_OK;
|
|
}
|
|
|
|
int ambapp_tmtc_1553_get_params(struct drvmgr_dev *dev, struct drvmgr_bus_params *params)
|
|
{
|
|
struct gr_tmtc_1553_priv *priv = dev->parent->dev->priv;
|
|
|
|
/* Device name prefix pointer, skip /dev */
|
|
params->dev_prefix = &priv->prefix[5];
|
|
|
|
return 0;
|
|
}
|
|
|
|
void gr_tmtc_1553_print_dev(struct drvmgr_dev *dev, int options)
|
|
{
|
|
struct gr_tmtc_1553_priv *priv = dev->priv;
|
|
struct pci_dev_info *devinfo = priv->devinfo;
|
|
uint32_t bar0, bar0_size;
|
|
|
|
/* Print */
|
|
printf("--- GR-TMTC-1553 [bus 0x%x, dev 0x%x, fun 0x%x] ---\n",
|
|
PCI_DEV_EXPAND(priv->pcidev));
|
|
|
|
bar0 = devinfo->resources[0].address;
|
|
bar0_size = devinfo->resources[0].size;
|
|
|
|
printf(" PCI BAR[0]: 0x%" PRIx32 " - 0x%" PRIx32 "\n",
|
|
bar0, bar0 + bar0_size - 1);
|
|
printf(" IRQ REGS: 0x%" PRIxPTR "\n", (uintptr_t)priv->irq);
|
|
printf(" IRQ: %d\n", devinfo->irq);
|
|
printf(" FREQ: %d Hz\n", priv->version->amba_freq_hz);
|
|
printf(" IMASK: 0x%08x\n", priv->irq->mask[0]);
|
|
printf(" IPEND: 0x%08x\n", priv->irq->ipend);
|
|
|
|
/* Print amba config */
|
|
if ( options & TMTC_1553_OPTIONS_AMBA ) {
|
|
ambapp_print(&priv->abus, 10);
|
|
}
|
|
#if 0
|
|
/* Print IRQ handlers and their arguments */
|
|
if ( options & TMTC_1553_OPTIONS_IRQ ) {
|
|
int i;
|
|
for(i=0; i<16; i++) {
|
|
printf(" IRQ[%02d]: 0x%x, arg: 0x%x\n",
|
|
i, (unsigned int)priv->isrs[i].handler, (unsigned int)priv->isrs[i].arg);
|
|
}
|
|
}
|
|
#endif
|
|
}
|
|
|
|
void gr_tmtc_1553_print(int options)
|
|
{
|
|
struct pci_drv_info *drv = &gr_tmtc_1553_info;
|
|
struct drvmgr_dev *dev;
|
|
|
|
dev = drv->general.dev;
|
|
while(dev) {
|
|
gr_tmtc_1553_print_dev(dev, options);
|
|
dev = dev->next_in_drv;
|
|
}
|
|
}
|