forked from Imagelibrary/rtems
a660e9dc47
Directly use "static inline" which is available in C99 and later. This brings the RTEMS implementation closer to standard C. Close #3935.
426 lines
12 KiB
C
426 lines
12 KiB
C
/*
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* This file contains the console driver for the xilinx uart lite.
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*
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* Author: Keith Robertson <kjrobert@alumni.uwaterloo.ca>
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* COPYRIGHT (c) 2005 by Linn Products Ltd, Scotland.
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*
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* Derived from libbsp/no_cpu/no_bsp/console.c and therefore also:
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*
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* COPYRIGHT (c) 1989-1999.
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* On-Line Applications Research Corporation (OAR).
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*
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*/
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#include <assert.h>
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#include <rtems.h>
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#include <rtems/libio.h>
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#include <bsp/irq.h>
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#include <bsp.h>
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#include <libchip/serial.h>
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#include <libchip/sersupp.h>
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#include RTEMS_XPARAMETERS_H
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/* Status Register Masks */
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#define PARITY_ERROR 0x80 /* Parity Error */
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#define FRAME_ERROR 0x40 /* Frame Error */
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#define OVERRUN_ERROR 0x20 /* Overrun Error */
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#define STATUS_REG_ERROR_MASK ( PARITY_ERROR | FRAME_ERROR | OVERRUN_ERROR )
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#define INTR_ENABLED 0x10 /* Interrupts are enabled */
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#define TX_FIFO_FULL 0x08 /* Transmit FIFO is full */
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#define TX_FIFO_EMPTY 0x04 /* Transmit FIFO is empty */
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#define RX_FIFO_FULL 0x02 /* Receive FIFO is full */
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#define RX_FIFO_VALID_DATA 0x01 /* Receive FIFO has valid data */
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/* Control Register Masks*/
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#define ENABLE_INTR 0x10 /* Enable interrupts */
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#define RST_RX_FIFO 0x02 /* Reset and clear RX FIFO */
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#define RST_TX_FIFO 0x01 /* Reset and clear TX FIFO */
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/* General Defines */
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#define TX_FIFO_SIZE 16
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#define RX_FIFO_SIZE 16
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#define RECV_REG 0
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#define TRAN_REG 4
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#define STAT_REG 8
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#define CTRL_REG 12
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static inline uint32_t xlite_uart_control(uint32_t base)
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{
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uint32_t c = *((volatile uint32_t*)(base+CTRL_REG));
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return c;
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}
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static inline uint32_t xlite_uart_status(uint32_t base)
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{
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uint32_t c = *((volatile uint32_t*)(base+STAT_REG));
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return c;
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}
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static inline uint32_t xlite_uart_read(uint32_t base)
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{
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uint32_t c = *((volatile uint32_t*)(base+RECV_REG));
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return c;
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}
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static inline void xlite_uart_write(uint32_t base, char ch)
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{
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*(volatile uint32_t*)(base+TRAN_REG) = (uint32_t)ch;
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return;
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}
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static int xlite_write_char(uint32_t base, char ch)
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{
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uint32_t retrycount= 0, idler, status;
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while( ((status = xlite_uart_status(base)) & TX_FIFO_FULL) != 0 )
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{
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++retrycount;
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/* uart tx is busy */
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if( retrycount == 0x4000 )
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{
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/* retrycount is arbitrary- just make it big enough so the uart is sure to be timed out before it trips */
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return -1;
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}
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/* spin for a bit so we can sample the register rather than
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* continually reading it */
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for( idler= 0; idler < 0x2000; idler++);
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}
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xlite_uart_write(base, ch);
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return 1;
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}
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static void xlite_init(int minor )
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{
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/* Nothing to do */
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}
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#if VIRTEX_CONSOLE_USE_INTERRUPTS
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static void xlite_interrupt_handler(void *arg)
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{
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int minor = (int) arg;
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const console_tbl *ct = Console_Port_Tbl[minor];
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console_data *cd = &Console_Port_Data[minor];
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uint32_t base = ct->ulCtrlPort1;
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uint32_t status = xlite_uart_status(base);
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while ((status & RX_FIFO_VALID_DATA) != 0) {
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char c = (char) xlite_uart_read(base);
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rtems_termios_enqueue_raw_characters(cd->termios_data, &c, 1);
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status = xlite_uart_status(base);
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}
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if (cd->bActive) {
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rtems_termios_dequeue_characters(cd->termios_data, 1);
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}
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}
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#endif /* VIRTEX_CONSOLE_USE_INTERRUPTS */
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static int xlite_open(
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int major,
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int minor,
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void *arg
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)
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{
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const console_tbl *ct = Console_Port_Tbl[minor];
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uint32_t base = ct->ulCtrlPort1;
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#if VIRTEX_CONSOLE_USE_INTERRUPTS
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rtems_status_code sc;
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#endif /* VIRTEX_CONSOLE_USE_INTERRUPTS */
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/* clear status register */
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*((volatile uint32_t*)(base+STAT_REG)) = 0;
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/* clear control register; reset fifos */
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*((volatile uint32_t*)(base+CTRL_REG)) = RST_RX_FIFO | RST_TX_FIFO;
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#if VIRTEX_CONSOLE_USE_INTERRUPTS
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*((volatile uint32_t*)(base+CTRL_REG)) = ENABLE_INTR;
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sc = rtems_interrupt_handler_install(
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ct->ulIntVector,
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"xlite",
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RTEMS_INTERRUPT_UNIQUE,
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xlite_interrupt_handler,
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(void *) minor
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);
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assert(sc == RTEMS_SUCCESSFUL);
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#endif /* VIRTEX_CONSOLE_USE_INTERRUPTS */
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return 0;
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}
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static int xlite_close(
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int major,
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int minor,
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void *arg
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)
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{
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const console_tbl *ct = Console_Port_Tbl[minor];
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uint32_t base = ct->ulCtrlPort1;
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#if VIRTEX_CONSOLE_USE_INTERRUPTS
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rtems_status_code sc;
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#endif /* VIRTEX_CONSOLE_USE_INTERRUPTS */
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*((volatile uint32_t*)(base+CTRL_REG)) = 0;
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#if VIRTEX_CONSOLE_USE_INTERRUPTS
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sc = rtems_interrupt_handler_remove(
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ct->ulIntVector,
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xlite_interrupt_handler,
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(void *) minor
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);
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assert(sc == RTEMS_SUCCESSFUL);
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#endif /* VIRTEX_CONSOLE_USE_INTERRUPTS */
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return 0;
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}
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static int xlite_read_polled (int minor )
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{
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uint32_t base = Console_Port_Tbl[minor]->ulCtrlPort1;
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unsigned int status = xlite_uart_status(base);
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if(status & RX_FIFO_VALID_DATA)
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return (int)xlite_uart_read(base);
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else
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return -1;
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}
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#if VIRTEX_CONSOLE_USE_INTERRUPTS
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static ssize_t xlite_write_interrupt_driven(
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int minor,
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const char *buf,
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size_t len
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)
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{
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console_data *cd = &Console_Port_Data[minor];
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if (len > 0) {
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const console_tbl *ct = Console_Port_Tbl[minor];
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uint32_t base = ct->ulCtrlPort1;
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xlite_uart_write(base, buf[0]);
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cd->bActive = true;
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} else {
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cd->bActive = false;
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}
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return 0;
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}
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#else /* VIRTEX_CONSOLE_USE_INTERRUPTS */
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static ssize_t xlite_write_buffer_polled(
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int minor,
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const char *buf,
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size_t len
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)
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{
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uint32_t base = Console_Port_Tbl[minor]->ulCtrlPort1;
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int nwrite = 0;
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/*
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* poll each byte in the string out of the port.
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*/
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while (nwrite < len)
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{
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if( xlite_write_char(base, *buf++) < 0 ) break;
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nwrite++;
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}
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/*
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* return the number of bytes written.
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*/
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return nwrite;
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}
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#endif /* VIRTEX_CONSOLE_USE_INTERRUPTS */
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static void xlite_write_char_polled(
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int minor,
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char c
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)
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{
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uint32_t base = Console_Port_Tbl[minor]->ulCtrlPort1;
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xlite_write_char(base, c);
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return;
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}
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static int xlite_set_attributes(int minor, const struct termios *t)
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{
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return RTEMS_SUCCESSFUL;
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}
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static const console_fns xlite_fns_polled =
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{
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.deviceProbe = libchip_serial_default_probe,
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.deviceFirstOpen = xlite_open,
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.deviceLastClose = xlite_close,
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.deviceRead = xlite_read_polled,
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.deviceInitialize = xlite_init,
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.deviceWritePolled = xlite_write_char_polled,
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.deviceSetAttributes = xlite_set_attributes,
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#if VIRTEX_CONSOLE_USE_INTERRUPTS
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.deviceWrite = xlite_write_interrupt_driven,
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.deviceOutputUsesInterrupts = true
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#else /* VIRTEX_CONSOLE_USE_INTERRUPTS */
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.deviceWrite = xlite_write_buffer_polled,
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.deviceOutputUsesInterrupts = false
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#endif /* VIRTEX_CONSOLE_USE_INTERRUPTS */
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};
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/*
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** Set ulCtrlPort1 to the base address of each UART Lite instance. Set in vhdl model.
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*/
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console_tbl Console_Configuration_Ports[] = {
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{
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"/dev/ttyS0", /* sDeviceName */
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SERIAL_CUSTOM, /* deviceType */
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&xlite_fns_polled, /* pDeviceFns */
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NULL, /* deviceProbe, assume it is there */
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NULL, /* pDeviceFlow */
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16, /* ulMargin */
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8, /* ulHysteresis */
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(void *) NULL, /* NULL */ /* pDeviceParams */
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STDIN_BASEADDRESS, /* ulCtrlPort1 */
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0, /* ulCtrlPort2 */
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0, /* ulDataPort */
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NULL, /* getRegister */
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NULL, /* setRegister */
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NULL, /* unused */ /* getData */
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NULL, /* unused */ /* setData */
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0, /* ulClock */
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#ifdef XPAR_XPS_INTC_0_RS232_UART_INTERRUPT_INTR
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.ulIntVector = XPAR_XPS_INTC_0_RS232_UART_INTERRUPT_INTR
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#else
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.ulIntVector = 0
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#endif
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},
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#ifdef XPAR_UARTLITE_1_BASEADDR
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{
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"/dev/ttyS1", /* sDeviceName */
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SERIAL_CUSTOM, /* deviceType */
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&xlite_fns_polled, /* pDeviceFns */
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NULL, /* deviceProbe, assume it is there */
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NULL, /* pDeviceFlow */
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16, /* ulMargin */
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8, /* ulHysteresis */
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(void *) NULL, /* NULL */ /* pDeviceParams */
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XPAR_UARTLITE_1_BASEADDR, /* ulCtrlPort1 */
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0, /* ulCtrlPort2 */
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0, /* ulDataPort */
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NULL, /* getRegister */
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NULL, /* setRegister */
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NULL, /* unused */ /* getData */
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NULL, /* unused */ /* setData */
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0, /* ulClock */
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0 /* ulIntVector -- base for port */
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},
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#endif
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#ifdef XPAR_UARTLITE_2_BASEADDR
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{
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"/dev/ttyS2", /* sDeviceName */
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SERIAL_CUSTOM, /* deviceType */
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&xlite_fns_polled, /* pDeviceFns */
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NULL, /* deviceProbe, assume it is there */
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NULL, /* pDeviceFlow */
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16, /* ulMargin */
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8, /* ulHysteresis */
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(void *) NULL, /* NULL */ /* pDeviceParams */
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XPAR_UARTLITE_2_BASEADDR, /* ulCtrlPort1 */
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0, /* ulCtrlPort2 */
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0, /* ulDataPort */
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NULL, /* getRegister */
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NULL, /* setRegister */
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NULL, /* unused */ /* getData */
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NULL, /* unused */ /* setData */
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0, /* ulClock */
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0 /* ulIntVector -- base for port */
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},
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#endif
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#ifdef XPAR_UARTLITE_2_BASEADDR
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{
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"/dev/ttyS3", /* sDeviceName */
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SERIAL_CUSTOM, /* deviceType */
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&xlite_fns_polled, /* pDeviceFns */
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NULL, /* deviceProbe, assume it is there */
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NULL, /* pDeviceFlow */
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16, /* ulMargin */
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8, /* ulHysteresis */
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(void *) NULL, /* NULL */ /* pDeviceParams */
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XPAR_UARTLITE_3_BASEADDR, /* ulCtrlPort1 */
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0, /* ulCtrlPort2 */
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0, /* ulDataPort */
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NULL, /* getRegister */
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NULL, /* setRegister */
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NULL, /* unused */ /* getData */
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NULL, /* unused */ /* setData */
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0, /* ulClock */
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0 /* ulIntVector -- base for port */
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}
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#endif
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};
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unsigned long Console_Configuration_Count =
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RTEMS_ARRAY_SIZE(Console_Configuration_Ports);
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#include <rtems/bspIo.h>
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static void outputChar(char ch)
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{
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xlite_write_char_polled( 0, ch );
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}
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static int inputChar(void)
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{
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return xlite_read_polled(0);
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}
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BSP_output_char_function_type BSP_output_char = outputChar;
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BSP_polling_getchar_function_type BSP_poll_char = inputChar;
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