forked from Imagelibrary/rtems
67 lines
2.1 KiB
C
67 lines
2.1 KiB
C
/* SPDX-License-Identifier: BSD-2-Clause */
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/**
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* @file
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*
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* @ingroup RTEMSDeviceSerialZynq
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*
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* @brief This header file provides interfaces with respect to the Zynq
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* UltraScale+ MPSoC and RFSoC platforms.
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*/
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/*
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* Copyright (C) 2024 embedded brains GmbH & Co. KG
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _DEV_SERIAL_ZYNQ_UART_ZYNQMP_H
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#define _DEV_SERIAL_ZYNQ_UART_ZYNQMP_H
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#ifdef __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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/**
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* @addtogroup RTEMSDeviceSerialZynq
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*
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* @{
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*/
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/**
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* @brief This constant defines the Xilinx Zynq UART 0 base address.
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*/
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#define ZYNQ_UART_0_BASE_ADDR 0xff000000
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/**
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* @brief This constant defines the Xilinx Zynq UART 1 base address.
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*/
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#define ZYNQ_UART_1_BASE_ADDR 0xff010000
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/** @} */
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#ifdef __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* _DEV_SERIAL_ZYNQ_UART_ZYNQMP_H */
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