forked from Imagelibrary/rtems
138 lines
3.7 KiB
C
138 lines
3.7 KiB
C
/* SPDX-License-Identifier: BSD-2-Clause */
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/**
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* @file
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*
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* @ingroup DevIRQGIC
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*
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* @brief This header file provides the TM27 support for the ARM Generic
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* Interrupt Controller (GIC).
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*/
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/*
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* Copyright (C) 2013, 2014 embedded brains GmbH & Co. KG
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _RTEMS_TMTEST27
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#error "This is an RTEMS internal file you must not include directly."
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#endif
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#ifndef LIBBSP_ARM_SHARED_ARM_GIC_TM27_H
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#define LIBBSP_ARM_SHARED_ARM_GIC_TM27_H
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#include <bsp.h>
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#include <bsp/irq.h>
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#include <rtems/score/assert.h>
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#define MUST_WAIT_FOR_INTERRUPT 1
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#ifndef ARM_GIC_TM27_IRQ_LOW
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#define ARM_GIC_TM27_IRQ_LOW ARM_GIC_IRQ_SGI_12
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#endif
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#ifndef ARM_GIC_TM27_IRQ_HIGH
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#define ARM_GIC_TM27_IRQ_HIGH ARM_GIC_IRQ_SGI_13
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#endif
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#define TM27_INTERRUPT_VECTOR_DEFAULT ARM_GIC_TM27_IRQ_LOW
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#define ARM_GIC_TM27_PRIO_LOW 0x80
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#define ARM_GIC_TM27_PRIO_HIGH 0x00
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static inline void Install_tm27_vector( rtems_interrupt_handler handler )
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{
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static rtems_interrupt_entry entry_low;
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static rtems_interrupt_entry entry_high;
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rtems_status_code sc;
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rtems_interrupt_entry_initialize(
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&entry_low,
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handler,
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NULL,
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"tm27 low"
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);
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sc = rtems_interrupt_entry_install(
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ARM_GIC_TM27_IRQ_LOW,
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RTEMS_INTERRUPT_UNIQUE,
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&entry_low
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);
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_Assert_Unused_variable_equals( sc, RTEMS_SUCCESSFUL );
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sc = rtems_interrupt_set_priority(
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ARM_GIC_TM27_IRQ_LOW,
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ARM_GIC_TM27_PRIO_LOW
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);
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_Assert_Unused_variable_equals( sc, RTEMS_SUCCESSFUL );
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rtems_interrupt_entry_initialize(
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&entry_high,
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handler,
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NULL,
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"tm27 high"
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);
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sc = rtems_interrupt_entry_install(
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ARM_GIC_TM27_IRQ_HIGH,
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RTEMS_INTERRUPT_UNIQUE,
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&entry_high
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);
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_Assert_Unused_variable_equals( sc, RTEMS_SUCCESSFUL );
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sc = rtems_interrupt_set_priority(
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ARM_GIC_TM27_IRQ_HIGH,
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ARM_GIC_TM27_PRIO_HIGH
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);
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_Assert_Unused_variable_equals( sc, RTEMS_SUCCESSFUL );
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}
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static inline void Cause_tm27_intr(void)
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{
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rtems_status_code sc;
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sc = rtems_interrupt_raise_on(
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ARM_GIC_TM27_IRQ_LOW,
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_SMP_Get_current_processor()
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);
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_Assert_Unused_variable_equals( sc, RTEMS_SUCCESSFUL );
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}
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static inline void Clear_tm27_intr(void)
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{
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/* Nothing to do */
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}
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static inline void Lower_tm27_intr(void)
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{
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rtems_status_code sc;
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sc = rtems_interrupt_raise_on(
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ARM_GIC_TM27_IRQ_HIGH,
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_SMP_Get_current_processor()
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);
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_Assert_Unused_variable_equals( sc, RTEMS_SUCCESSFUL );
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}
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#endif /* LIBBSP_ARM_SHARED_ARM_GIC_TM27_H */
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