forked from Imagelibrary/rtems
002c6067ba
Mark bsp_reset() as no-return. Use default BSP fatal handler in lm32 and m68k BSPs. Remove empty bsp_reset() implementation. Update #5067.
57 lines
2.0 KiB
C
57 lines
2.0 KiB
C
/* SPDX-License-Identifier: BSD-2-Clause */
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/**
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* @file
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*
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* @ingroup RTEMSBSPsARMZynq
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*
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* @brief This source file contains the implementation of bsp_reset().
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*/
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/*
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* Copyright (C) 2013 embedded brains GmbH & Co. KG
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <bsp.h>
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#include <bsp/bootcard.h>
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#include <dev/serial/zynq-uart-regs.h>
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void bsp_reset( rtems_fatal_source source, rtems_fatal_code code )
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{
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volatile zynq_uart *regs =
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(volatile zynq_uart *) ZYNQ_UART_KERNEL_IO_BASE_ADDR;
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volatile uint32_t *slcr_unlock = (volatile uint32_t *) 0xf8000008;
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volatile uint32_t *pss_rst_ctrl = (volatile uint32_t *) 0xf8000200;
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(void) source;
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(void) code;
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zynq_uart_reset_tx_flush(regs);
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while (true) {
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*slcr_unlock = 0xdf0d;
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*pss_rst_ctrl = 0x1;
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}
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}
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