forked from Imagelibrary/rtems
cb78150d86
This patch updates STM32 H7 HAL source files. The files are taken from two STM projects from their github.com repositories: (i) https://github.com/STMicroelectronics/stm32h7xx_hal_driver.git The project files are still available under BSD-3 license and the version/commit used is: fec141ce999da655a48e1a15db83a72d564a1312 which represents Release v1.11.3 exactly. (ii) https://github.com/STMicroelectronics/cmsis_device_h7.git The project files are available under Apache 2.0 license. Fortunately the project does not contain NOTICE file so no need to do anything special when used in RTEMS. The project version/commit imported is: faccfec37f82f7a1319c21638111b0f7335de7fe which represents Release v1.10.4 exactly.
400 lines
17 KiB
C
400 lines
17 KiB
C
/**
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******************************************************************************
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* @file stm32h7xx_hal_ramecc.h
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* @author MCD Application Team
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* @brief Header file of RAMECC HAL module.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2017 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef STM32H7xx_HAL_RAMECC_H
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#define STM32H7xx_HAL_RAMECC_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32h7xx_hal_def.h"
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/** @addtogroup STM32H7xx_HAL_Driver
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* @{
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*/
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/** @addtogroup RAMECC
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup RAMECC_Exported_Types RAMECC Exported Types
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* @ingroup RTEMSBSPsARMSTM32H7
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* @brief RAMECC Exported Types
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* @{
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*/
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/**
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* @brief HAL RAMECC State structures definition
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*/
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typedef enum
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{
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HAL_RAMECC_STATE_RESET = 0x00U, /*!< RAMECC not yet initialized or disabled */
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HAL_RAMECC_STATE_READY = 0x01U, /*!< RAMECC initialized and ready for use */
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HAL_RAMECC_STATE_BUSY = 0x02U, /*!< RAMECC process is ongoing */
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HAL_RAMECC_STATE_ERROR = 0x03U, /*!< RAMECC error state */
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}HAL_RAMECC_StateTypeDef;
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/**
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* @brief RAMECC handle Structure definition
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*/
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#if (USE_HAL_RAMECC_REGISTER_CALLBACKS == 1)
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typedef struct __RAMECC_HandleTypeDef
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#else
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typedef struct
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#endif /* USE_HAL_RAMECC_REGISTER_CALLBACKS */
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{
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RAMECC_MonitorTypeDef *Instance; /*!< Register base address */
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__IO HAL_RAMECC_StateTypeDef State; /*!< RAMECC state */
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__IO uint32_t ErrorCode; /*!< RAMECC Error Code */
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__IO uint32_t RAMECCErrorCode; /*!< RAMECC Detected Error Code */
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#if (USE_HAL_RAMECC_REGISTER_CALLBACKS == 1)
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void (* DetectErrorCallback)( struct __RAMECC_HandleTypeDef *hramecc); /*!< RAMECC Error Detect callback */
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#endif /* USE_HAL_RAMECC_REGISTER_CALLBACKS */
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}RAMECC_HandleTypeDef;
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/**
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* @}
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*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup RAMECC_Exported_Constants RAMECC Exported Constants
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* @ingroup RTEMSBSPsARMSTM32H7
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* @{
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*/
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/** @defgroup RAMECC_Error_Codes RAMECC Error Codes
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* @ingroup RTEMSBSPsARMSTM32H7
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* @{
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*/
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#define HAL_RAMECC_ERROR_NONE 0x00000000U /*!< RAMECC No Error */
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#define HAL_RAMECC_ERROR_TIMEOUT 0x00000001U /*!< RAMECC Timeout Error */
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#define HAL_RAMECC_ERROR_BUSY 0x00000002U /*!< RAMECC Busy Error */
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#if (USE_HAL_RAMECC_REGISTER_CALLBACKS == 1)
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#define HAL_RAMECC_ERROR_INVALID_CALLBACK 0x00000003U /*!< Invalid Callback error */
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#endif /* USE_HAL_RAMECC_REGISTER_CALLBACKS */
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/**
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* @}
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*/
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/** @defgroup RAMECC_Error_Codes RAMECC Error Detected Codes
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* @{
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*/
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#define HAL_RAMECC_NO_ERROR 0x00000000U /*!< RAMECC No Error Detected */
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#define HAL_RAMECC_SINGLEERROR_DETECTED 0x00000001U /*!< RAMECC Single Error Detected */
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#define HAL_RAMECC_DOUBLEERROR_DETECTED 0x00000002U /*!< RAMECC Double Error Detected */
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/**
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* @}
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*/
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/** @defgroup RAMECC_Interrupt RAMECC interrupts
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* @ingroup RTEMSBSPsARMSTM32H7
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* @{
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*/
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#define RAMECC_IT_GLOBAL_ID 0x10000000UL
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#define RAMECC_IT_MONITOR_ID 0x20000000UL
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#define RAMECC_IT_GLOBAL_ENABLE (RAMECC_IT_GLOBAL_ID | RAMECC_IER_GIE)
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#define RAMECC_IT_GLOBAL_SINGLEERR_R (RAMECC_IT_GLOBAL_ID | RAMECC_IER_GECCSEIE)
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#define RAMECC_IT_GLOBAL_DOUBLEERR_R (RAMECC_IT_GLOBAL_ID | RAMECC_IER_GECCDEIE)
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#define RAMECC_IT_GLOBAL_DOUBLEERR_W (RAMECC_IT_GLOBAL_ID | RAMECC_IER_GECCDEBWIE)
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#define RAMECC_IT_GLOBAL_ALL (RAMECC_IT_GLOBAL_ID | RAMECC_IER_GIE | RAMECC_IER_GECCSEIE | RAMECC_IER_GECCDEIE | RAMECC_IER_GECCDEBWIE)
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#define RAMECC_IT_MONITOR_SINGLEERR_R (RAMECC_IT_MONITOR_ID | RAMECC_CR_ECCSEIE)
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#define RAMECC_IT_MONITOR_DOUBLEERR_R (RAMECC_IT_MONITOR_ID | RAMECC_CR_ECCDEIE)
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#define RAMECC_IT_MONITOR_DOUBLEERR_W (RAMECC_IT_MONITOR_ID | RAMECC_CR_ECCDEBWIE)
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#define RAMECC_IT_MONITOR_ALL (RAMECC_IT_MONITOR_ID | RAMECC_CR_ECCDEBWIE | RAMECC_CR_ECCDEIE | RAMECC_CR_ECCSEIE)
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/**
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* @}
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*/
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/** @defgroup RAMECC_FLAG RAMECC Monitor flags
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* @ingroup RTEMSBSPsARMSTM32H7
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* @{
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*/
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#define RAMECC_FLAG_SINGLEERR_R RAMECC_SR_SEDCF
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#define RAMECC_FLAG_DOUBLEERR_R RAMECC_SR_DEDF
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#define RAMECC_FLAG_DOUBLEERR_W RAMECC_SR_DEBWDF
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#define RAMECC_FLAGS_ALL (RAMECC_SR_SEDCF | RAMECC_SR_DEDF | RAMECC_SR_DEBWDF)
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported macro ------------------------------------------------------------*/
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/** @defgroup RAMECC_Exported_Macros RAMECC Exported Macros
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* @ingroup RTEMSBSPsARMSTM32H7
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* @{
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*/
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#define __HAL_RAMECC_ENABLE_GLOBAL_IT(__HANDLE__, __INTERRUPT__) ((((RAMECC_TypeDef *)((uint32_t)(__HANDLE__)->Instance & 0xFFFFFF00U))->IER) |= ((__INTERRUPT__) & ~RAMECC_IT_GLOBAL_ID))
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#define __HAL_RAMECC_ENABLE_MONITOR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= ((__INTERRUPT__) & ~RAMECC_IT_MONITOR_ID))
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/**
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* @brief Enable the specified RAMECC interrupts.
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* @param __HANDLE__ : RAMECC handle.
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* @param __INTERRUPT__: specifies the RAMECC interrupt sources to be enabled or disabled.
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* This parameter can be one of the following values:
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* @arg RAMECC_IT_GLOBAL_ENABLE : Global interrupt enable mask.
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* @arg RAMECC_IT_GLOBAL_SINGLEERR_R : Global ECC single error interrupt enable.
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* @arg RAMECC_IT_GLOBAL_DOUBLEERR_R : Global ECC double error interrupt enable.
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* @arg RAMECC_IT_GLOBAL_DOUBLEERR_W : Global ECC double error on byte write (BW) interrupt enable.
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* @arg RAMECC_IT_GLOBAL_ALL : All Global ECC interrupts enable mask.
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* @arg RAMECC_IT_MONITOR_SINGLEERR_R : Monitor ECC single error interrupt enable.
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* @arg RAMECC_IT_MONITOR_DOUBLEERR_R : Monitor ECC double error interrupt enable.
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* @arg RAMECC_IT_MONITOR_DOUBLEERR_W : Monitor ECC double error on byte write (BW) interrupt enable.
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* @arg RAMECC_IT_MONITOR_ALL : All Monitor ECC interrupts enable mask.
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* @retval None
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*/
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#define __HAL_RAMECC_ENABLE_IT(__HANDLE__, __INTERRUPT__) ( \
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(IS_RAMECC_GLOBAL_INTERRUPT(__INTERRUPT__)) ? (__HAL_RAMECC_ENABLE_GLOBAL_IT((__HANDLE__), (__INTERRUPT__))) :\
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(__HAL_RAMECC_ENABLE_MONITOR_IT((__HANDLE__), (__INTERRUPT__))))
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#define __HAL_RAMECC_DISABLE_GLOBAL_IT(__HANDLE__, __INTERRUPT__) ((((RAMECC_TypeDef *)((uint32_t)(__HANDLE__)->Instance & 0xFFFFFF00U))->IER) &= ~((__INTERRUPT__) & ~RAMECC_IT_GLOBAL_ID))
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#define __HAL_RAMECC_DISABLE_MONITOR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~((__INTERRUPT__) & ~RAMECC_IT_MONITOR_ID))
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/**
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* @brief Disable the specified RAMECC interrupts.
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* @param __HANDLE__ : RAMECC handle.
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* @param __INTERRUPT__: specifies the RAMECC interrupt sources to be enabled or disabled.
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* This parameter can be one of the following values:
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* @arg RAMECC_IT_GLOBAL_ENABLE : Global interrupt enable mask.
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* @arg RAMECC_IT_GLOBAL_SINGLEERR_R : Global ECC single error interrupt enable.
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* @arg RAMECC_IT_GLOBAL_DOUBLEERR_R : Global ECC double error interrupt enable.
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* @arg RAMECC_IT_GLOBAL_DOUBLEERR_W : Global ECC double error on byte write (BW) interrupt enable.
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* @arg RAMECC_IT_GLOBAL_ALL : All Global ECC interrupts enable mask.
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* @arg RAMECC_IT_MONITOR_SINGLEERR_R : Monitor ECC single error interrupt enable.
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* @arg RAMECC_IT_MONITOR_DOUBLEERR_R : Monitor ECC double error interrupt enable.
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* @arg RAMECC_IT_MONITOR_DOUBLEERR_W : Monitor ECC double error on byte write (BW) interrupt enable.
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* @arg RAMECC_IT_MONITOR_ALL : All Monitor ECC interrupts enable mask.
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* @retval None
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*/
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#define __HAL_RAMECC_DISABLE_IT(__HANDLE__, __INTERRUPT__) ( \
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(IS_RAMECC_GLOBAL_INTERRUPT(__INTERRUPT__)) ? (__HAL_RAMECC_DISABLE_GLOBAL_IT((__HANDLE__), (__INTERRUPT__))) :\
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(__HAL_RAMECC_DISABLE_MONITOR_IT((__HANDLE__), (__INTERRUPT__))))
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#define __HAL_RAMECC_GET_GLOBAL_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((RAMECC_TypeDef *)((uint32_t)(__HANDLE__)->Instance & 0xFFFFFF00U))->IER) & ((__INTERRUPT__) & ~RAMECC_IT_GLOBAL_ID)) ? SET : RESET)
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#define __HAL_RAMECC_GET_MONITOR_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR) & ((__INTERRUPT__) & ~RAMECC_IT_GLOBAL_ID)) ? SET : RESET)
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/**
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* @brief Check whether the specified RAMECC interrupt source is enabled or not.
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* @param __HANDLE__ : Specifies the RAMECC Handle.
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* @param __INTERRUPT__ : Specifies the RAMECC interrupt source to check.
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* This parameter can be one of the following values:
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* @arg RAMECC_IT_GLOBAL_ENABLE : Global interrupt enable mask.
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* @arg RAMECC_IT_GLOBAL_SINGLEERR_R : Global ECC single error interrupt enable.
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* @arg RAMECC_IT_GLOBAL_DOUBLEERR_R : Global ECC double error interrupt enable.
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* @arg RAMECC_IT_GLOBAL_DOUBLEERR_W : Global ECC double error on byte write (BW) interrupt enable.
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* @arg RAMECC_IT_GLOBAL_ALL : All Global ECC interrupts enable mask.
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* @arg RAMECC_IT_MONITOR_SINGLEERR_R : Monitor ECC single error interrupt enable.
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* @arg RAMECC_IT_MONITOR_DOUBLEERR_R : Monitor ECC double error interrupt enable.
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* @arg RAMECC_IT_MONITOR_DOUBLEERR_W : Monitor ECC double error on byte write (BW) interrupt enable.
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* @arg RAMECC_IT_MONITOR_ALL : All Monitor ECC interrupts enable mask.
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* @retval The new state of __INTERRUPT__ (SET or RESET).
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*/
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#define __HAL_RAMECC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ( \
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(IS_RAMECC_GLOBAL_INTERRUPT(__INTERRUPT__)) ? (__HAL_RAMECC_GET_GLOBAL_IT_SOURCE((__HANDLE__), (__INTERRUPT__))) :\
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(__HAL_RAMECC_GET_MONITOR_IT_SOURCE((__HANDLE__), (__INTERRUPT__))))
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/**
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* @brief Get the RAMECC pending flags.
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* @param __HANDLE__ : RAMECC handle.
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* @param __FLAG__ : specifies the flag to clear.
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* This parameter can be any combination of the following values:
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* @arg RAMECC_FLAG_SINGLEERR_R : RAMECC instance ECC single error detected and corrected flag.
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* @arg RAMECC_FLAG_DOUBLEERR_R : RAMECC instance ECC double error detected flag.
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* @arg RAMECC_FLAG_DOUBLEERR_W : RAMECC instance ECC double error on byte write (BW) detected flag.
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* @arg RAMECC_FLAGS_ALL : RAMECC instance all flag.
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* @retval The state of __FLAG__ (SET or RESET).
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*/
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#define __HAL_RAMECC_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR &= (__FLAG__))
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/**
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* @brief Clear the RAMECC pending flags.
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* @param __HANDLE__ : RAMECC handle.
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* @param __FLAG__ : specifies the flag to clear.
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* This parameter can be any combination of the following values:
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* @arg RAMECC_FLAG_SINGLEERR_R : RAMECC instance ECC single error detected and corrected flag.
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* @arg RAMECC_FLAG_DOUBLEERR_R : RAMECC instance ECC double error detected flag.
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* @arg RAMECC_FLAG_DOUBLEERR_W : RAMECC instance ECC double error on byte write (BW) detected flag.
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* @arg RAMECC_FLAGS_ALL : RAMECC instance all flag.
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* @retval None.
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*/
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#define __HAL_RAMECC_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR &= ~(__FLAG__))
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/**
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* @brief Reset the RAMECC handle state.
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* @param __HANDLE__ : Specifies the RAMECC Handle.
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* @retval None.
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*/
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#define __HAL_RAMECC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_RAMECC_STATE_RESET)
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/**
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* @}
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*/
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/* Exported functions --------------------------------------------------------*/
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/** @defgroup RAMECC_Exported_Functions RAMECC Exported Functions
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* @ingroup RTEMSBSPsARMSTM32H7
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* @brief RAMECC Exported functions
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* @{
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*/
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/** @defgroup RAMECC_Exported_Functions_Group1 Initialization and de-initialization functions
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* @ingroup RTEMSBSPsARMSTM32H7
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* @brief Initialization and de-initialization functions
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* @{
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*/
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HAL_StatusTypeDef HAL_RAMECC_Init(RAMECC_HandleTypeDef *hramecc);
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HAL_StatusTypeDef HAL_RAMECC_DeInit(RAMECC_HandleTypeDef *hramecc);
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/**
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* @}
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*/
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/** @defgroup RAMECC_Exported_Functions_Group2 monitoring operation functions
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* @ingroup RTEMSBSPsARMSTM32H7
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* @brief monitoring operation functions
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* @{
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*/
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HAL_StatusTypeDef HAL_RAMECC_StartMonitor(RAMECC_HandleTypeDef *hramecc);
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HAL_StatusTypeDef HAL_RAMECC_StopMonitor(RAMECC_HandleTypeDef *hramecc);
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HAL_StatusTypeDef HAL_RAMECC_EnableNotification(RAMECC_HandleTypeDef *hramecc, uint32_t Notifications);
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HAL_StatusTypeDef HAL_RAMECC_DisableNotification(RAMECC_HandleTypeDef *hramecc, uint32_t Notifications);
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/**
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* @}
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*/
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/** @defgroup RAMECC_Exported_Functions_Group3 handle Interrupt and Callbacks Functions
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* @ingroup RTEMSBSPsARMSTM32H7
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* @brief handle Interrupt and Callbacks Functions
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* @{
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*/
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void HAL_RAMECC_IRQHandler(RAMECC_HandleTypeDef *hramecc);
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void HAL_RAMECC_DetectErrorCallback(RAMECC_HandleTypeDef *hramecc);
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#if (USE_HAL_RAMECC_REGISTER_CALLBACKS == 1)
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HAL_StatusTypeDef HAL_RAMECC_RegisterCallback(RAMECC_HandleTypeDef *hramecc, void (* pCallback)(RAMECC_HandleTypeDef *_hramecc));
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HAL_StatusTypeDef HAL_RAMECC_UnRegisterCallback(RAMECC_HandleTypeDef *hramecc);
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#endif /* USE_HAL_RAMECC_REGISTER_CALLBACKS */
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/**
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* @}
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*/
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/** @defgroup RAMECC_Exported_Functions_Group4 Error information functions
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* @ingroup RTEMSBSPsARMSTM32H7
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* @brief Error information functions
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* @{
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*/
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uint32_t HAL_RAMECC_GetFailingAddress(RAMECC_HandleTypeDef *hramecc);
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uint32_t HAL_RAMECC_GetFailingDataLow(RAMECC_HandleTypeDef *hramecc);
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uint32_t HAL_RAMECC_GetFailingDataHigh(RAMECC_HandleTypeDef *hramecc);
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uint32_t HAL_RAMECC_GetHammingErrorCode(RAMECC_HandleTypeDef *hramecc);
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uint32_t HAL_RAMECC_IsECCSingleErrorDetected(RAMECC_HandleTypeDef *hramecc);
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uint32_t HAL_RAMECC_IsECCDoubleErrorDetected(RAMECC_HandleTypeDef *hramecc);
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/**
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* @}
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*/
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/** @defgroup RAMECC_Exported_Functions_Group5 State and Error Functions
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* @ingroup RTEMSBSPsARMSTM32H7
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* @brief State and Error Functions
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* @{
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*/
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HAL_RAMECC_StateTypeDef HAL_RAMECC_GetState(RAMECC_HandleTypeDef *hramecc);
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uint32_t HAL_RAMECC_GetError(RAMECC_HandleTypeDef *hramecc);
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uint32_t HAL_RAMECC_GetRAMECCError(RAMECC_HandleTypeDef *hramecc);
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Private Constants -------------------------------------------------------------*/
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/** @defgroup RAMECC_Private_Constants RAMECC Private Constants
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* @ingroup RTEMSBSPsARMSTM32H7
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* @brief RAMECC private defines and constants
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* @{
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*/
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/**
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* @}
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*/
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/* Private macros ------------------------------------------------------------*/
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/** @defgroup RAMECC_Private_Macros RAMECC Private Macros
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* @ingroup RTEMSBSPsARMSTM32H7
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* @brief RAMECC private macros
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* @{
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*/
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#define IS_RAMECC_GLOBAL_INTERRUPT(INTERRUPT) (((INTERRUPT) == RAMECC_IT_GLOBAL_ENABLE) || \
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((INTERRUPT) == RAMECC_IT_GLOBAL_SINGLEERR_R) || \
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((INTERRUPT) == RAMECC_IT_GLOBAL_DOUBLEERR_R) || \
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((INTERRUPT) == RAMECC_IT_GLOBAL_DOUBLEERR_W) || \
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((INTERRUPT) == RAMECC_IT_GLOBAL_ALL))
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#define IS_RAMECC_MONITOR_INTERRUPT(INTERRUPT) (((INTERRUPT) == RAMECC_IT_MONITOR_SINGLEERR_R) || \
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((INTERRUPT) == RAMECC_IT_MONITOR_DOUBLEERR_R) || \
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((INTERRUPT) == RAMECC_IT_MONITOR_DOUBLEERR_W) || \
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((INTERRUPT) == RAMECC_IT_MONITOR_ALL))
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#define IS_RAMECC_INTERRUPT(INTERRUPT) ((IS_RAMECC_GLOBAL_INTERRUPT(INTERRUPT)) || \
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(IS_RAMECC_MONITOR_INTERRUPT(INTERRUPT)))
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/**
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* @}
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*/
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/* Private functions ---------------------------------------------------------*/
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/** @defgroup RAMECC_Private_Functions RAMECC Private Functions
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* @ingroup RTEMSBSPsARMSTM32H7
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* @brief RAMECC private functions
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* @{
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* STM32H7xx_HAL_RAMECC_H */
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