forked from Imagelibrary/rtems
9964895866
Adjust build support files to new directory layout. This patch is a part of the BSP source reorganization. Update #3285.
123 lines
3.2 KiB
C
123 lines
3.2 KiB
C
/*
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* Cogent CSB336 - MC9328MXL SBC startup code
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*/
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/*
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* Copyright (c) 2004 by Cogent Computer Systems
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* Written by Jay Monkman <jtm@lopingdog.com>
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#include <bsp.h>
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#include <bsp/irq-generic.h>
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#include <rtems/bspIo.h>
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#include <mc9328mxl.h>
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#include <libcpu/mmu.h>
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/*
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* bsp_start_default - BSP initialization function
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*
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* This function is called before RTEMS is initialized and used
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* adjust the kernel's configuration.
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*
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* This function also configures the CPU's memory protection unit.
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*
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* RESTRICTIONS/LIMITATIONS:
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* Since RTEMS is not configured, no RTEMS functions can be called.
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*
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*/
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static void bsp_start_default( void )
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{
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int i;
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/* Set the MCU prescaler to divide by 1 */
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MC9328MXL_PLL_CSCR &= ~MC9328MXL_PLL_CSCR_PRESC;
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/* Enable the MCU PLL */
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MC9328MXL_PLL_CSCR |= MC9328MXL_PLL_CSCR_MPEN;
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/* Delay to allow time for PLL to get going */
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for (i = 0; i < 100; i++) {
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__asm__ volatile ("nop\n");
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}
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/* Set the CPU to asynchrous clock mode, so it uses its fastest clock */
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mmu_set_cpu_async_mode();
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/* disable interrupts */
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MC9328MXL_AITC_INTENABLEL = 0;
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MC9328MXL_AITC_INTENABLEH = 0;
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/* Set interrupt priority to -1 (allow all priorities) */
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MC9328MXL_AITC_NIMASK = 0x1f;
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/*
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* Init rtems interrupt management
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*/
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bsp_interrupt_initialize();
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} /* bsp_start */
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/* Calcuate the frequency for perclk1 */
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int get_perclk1_freq(void)
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{
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unsigned int fin;
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unsigned int fpll;
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unsigned int pd;
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unsigned int mfd;
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unsigned int mfi;
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unsigned int mfn;
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uint32_t reg;
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int perclk1;
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if (MC9328MXL_PLL_CSCR & MC9328MXL_PLL_CSCR_SYSSEL) {
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/* Use external oscillator */
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fin = BSP_OSC_FREQ;
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} else {
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/* Use scaled xtal freq */
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fin = BSP_XTAL_FREQ * 512;
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}
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/* calculate the output of the system PLL */
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reg = MC9328MXL_PLL_SPCTL0;
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pd = ((reg & MC9328MXL_PLL_SPCTL_PD_MASK) >>
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MC9328MXL_PLL_SPCTL_PD_SHIFT);
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mfd = ((reg & MC9328MXL_PLL_SPCTL_MFD_MASK) >>
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MC9328MXL_PLL_SPCTL_MFD_SHIFT);
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mfi = ((reg & MC9328MXL_PLL_SPCTL_MFI_MASK) >>
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MC9328MXL_PLL_SPCTL_MFI_SHIFT);
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mfn = ((reg & MC9328MXL_PLL_SPCTL_MFN_MASK) >>
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MC9328MXL_PLL_SPCTL_MFN_SHIFT);
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#if 0
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printk("fin = %d\n", fin);
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printk("pd = %d\n", pd);
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printk("mfd = %d\n", mfd);
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printk("mfi = %d\n", mfi);
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printk("mfn = %d\n", mfn);
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printk("rounded (fin * mfi) / (pd + 1) = %d\n", (fin * mfi) / (pd + 1));
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printk("rounded (fin * mfn) / ((pd + 1) * (mfd + 1)) = %d\n",
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((long long)fin * mfn) / ((pd + 1) * (mfd + 1)));
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#endif
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fpll = 2 * ( ((fin * mfi + (pd + 1) / 2) / (pd + 1)) +
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(((long long)fin * mfn + ((pd + 1) * (mfd + 1)) / 2) /
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((pd + 1) * (mfd + 1))) );
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/* calculate the output of the PERCLK1 divider */
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reg = MC9328MXL_PLL_PCDR;
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perclk1 = fpll / (1 + ((reg & MC9328MXL_PLL_PCDR_PCLK1_MASK) >>
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MC9328MXL_PLL_PCDR_PCLK1_SHIFT));
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return perclk1;
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}
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/*
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* By making this a weak alias for bsp_start_default, a brave soul
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* can override the actual bsp_start routine used.
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*/
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void bsp_start (void) __attribute__ ((weak, alias("bsp_start_default")));
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