forked from Imagelibrary/rtems
8cb4b08aea
* startup/bspstart.c: removed legacy code (inherited from old mvme2307 BSP) -- for testing trapping into PPCBug -- which is irrelevant on this BSP. Removed warning about SPRG0 having been reassigned -- this BSP is OK.
492 lines
12 KiB
C
492 lines
12 KiB
C
/*
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* This routine starts the application. It includes application,
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* board, and monitor specific initialization and configuration.
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* The generic CPU dependent initialization has been performed
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* before this routine is invoked.
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*
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* COPYRIGHT (c) 1989-1998.
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* On-Line Applications Research Corporation (OAR).
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.com/license/LICENSE.
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*
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* Modified to support the MCP750.
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* Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
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*
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* Modified for mvme3100 by T. Straumann
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*
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* $Id$
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*/
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#include <string.h>
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#include <stdlib.h>
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#include <rtems.h>
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#include <bsp.h>
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#include <rtems/bspIo.h>
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#include <libcpu/spr.h>
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#include <libcpu/io.h>
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#include <libcpu/e500_mmu.h>
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#include <bsp/uart.h>
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#include <bsp/irq.h>
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#include <bsp/pci.h>
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#include <bsp/vpd.h>
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#include <libcpu/cpuIdent.h>
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#include <bsp/vectors.h>
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#include <rtems/powerpc/powerpc.h>
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#define SHOW_MORE_INIT_SETTINGS
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#undef DEBUG
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#define NumberOf(arr) (sizeof(arr)/sizeof(arr[0]))
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#ifdef DEBUG
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#define STATIC
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#else
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#define STATIC static
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#endif
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extern unsigned long __rtems_end[];
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extern void BSP_vme_config(void);
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void bsp_cleanup(void)
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{
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bsp_reset();
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}
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/*
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* Copy Additional boot param passed by boot loader
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*/
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#define CMDLINE_BUF_SIZE 2048
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static char cmdline_buf[CMDLINE_BUF_SIZE] = {0};
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char *BSP_commandline_string = cmdline_buf;
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extern const char *BSP_build_date;
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/*
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* Vital Board data Start using DATA RESIDUAL
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*/
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uint32_t bsp_clicks_per_usec = 0;
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/*
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* Total memory using RESIDUAL DATA
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*/
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unsigned int BSP_mem_size = 0;
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/*
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* Where the heap starts; is used by bsp_pretasking_hook;
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*/
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unsigned int BSP_heap_start = 0;
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/*
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* PCI Bus Frequency
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*/
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unsigned int BSP_pci_bus_frequency = 0xdeadbeef;
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/*
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* PPC Bus Frequency
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*/
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unsigned int BSP_bus_frequency = 0;
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/*
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* processor clock frequency
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*/
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unsigned int BSP_processor_frequency = 0;
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/*
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* Time base divisior (how many tick for 1 second).
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*/
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unsigned int BSP_time_base_divisor = 8000; /* if external RTC clock unused (HID0) */
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/* Board identification string */
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char BSP_productIdent[20] = {0};
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char BSP_serialNumber[20] = {0};
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/* VPD appends an extra char -- what for ? */
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char BSP_enetAddr0[7] = {0};
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char BSP_enetAddr1[7] = {0};
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char BSP_enetAddr2[7] = {0};
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static void
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prether(char *b, int idx)
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{
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int i;
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printk("Ethernet %i %02X", idx, *b++);
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for ( i=0; i<5; i++ )
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printk(":%02X",*b++);
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printk("\n");
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}
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/*
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* system init stack and soft ir stack size
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*/
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#define INIT_STACK_SIZE 0x1000
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#define INTR_STACK_SIZE rtems_configuration_get_interrupt_stack_size()
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BSP_output_char_function_type BSP_output_char = BSP_output_char_via_serial;
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void BSP_panic(char *s)
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{
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printk("\n%s PANIC %s\n",_RTEMS_version, s);
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__asm__ __volatile ("sc");
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}
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void _BSP_Fatal_error(unsigned int v)
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{
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printk("\n%s PANIC ERROR %x\n",_RTEMS_version, v);
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__asm__ __volatile ("sc");
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}
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/*
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* The original table from the application and our copy of it with
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* some changes.
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*/
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extern rtems_configuration_table Configuration;
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char *rtems_progname;
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/*
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* Use the shared implementations of the following routines
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*/
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void save_boot_params(void* r3, void *r4, void* r5, char *additional_boot_options)
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{
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strncpy(cmdline_buf, additional_boot_options, CMDLINE_BUF_SIZE);
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cmdline_buf[CMDLINE_BUF_SIZE - 1] ='\0';
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}
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#define CS_CONFIG_CS_EN (1<<31)
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#define CS_BNDS_SA(x) ((((uint32_t)(x))>>(31-15)) & 0xff)
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#define CS_BNDS_EA(x) ((((uint32_t)(x))>>(31-31)) & 0xff)
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static inline uint32_t
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_ccsr_rd32(uint32_t off)
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{
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return in_be32( (volatile unsigned *)(BSP_8540_CCSR_BASE + off) );
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}
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static inline void
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_ccsr_wr32(uint32_t off, uint32_t val)
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{
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out_be32( (volatile unsigned *)(BSP_8540_CCSR_BASE + off), val );
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}
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STATIC uint32_t
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BSP_get_mem_size()
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{
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int i;
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uint32_t cs_bnds, cs_config;
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uint32_t memsz=0;
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uint32_t v;
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for ( cs_bnds = 0x2000, cs_config=0x2080, i=0; i<4; i++, cs_bnds+=8, cs_config+=4 ) {
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if ( CS_CONFIG_CS_EN & _ccsr_rd32( cs_config ) ) {
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v = _ccsr_rd32( cs_bnds );
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memsz += CS_BNDS_EA(v) - CS_BNDS_SA(v) + 1;
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}
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}
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return memsz << 24;
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}
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STATIC void
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BSP_calc_freqs()
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{
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uint32_t porpllsr = _ccsr_rd32( 0xe0000 );
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unsigned plat_ratio = (porpllsr >> (31-30)) & 0x1f;
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unsigned e500_ratio = (porpllsr >> (31-15)) & 0x3f;
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switch ( plat_ratio ) {
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case 2: case 3: case 4: case 5: case 6:
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case 8: case 9: case 10: case 12: case 16:
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/* supported ratios */
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BSP_bus_frequency = BSP_pci_bus_frequency * plat_ratio;
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break;
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default:
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BSP_panic("Unknown PLL sys-clock ratio; something's wrong here");
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}
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switch ( e500_ratio ) {
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case 4: case 5: case 6: case 7:
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BSP_processor_frequency = (BSP_pci_bus_frequency * e500_ratio) >> 1;
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break;
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default:
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BSP_panic("Unknown PLL e500-clock ratio; something's wrong here");
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}
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printk("Core Complex Bus (CCB) Clock Freq: %10u Hz\n", BSP_bus_frequency);
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printk("CPU Clock Freq: %10u Hz\n", BSP_processor_frequency);
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}
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void
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bsp_predriver_hook(void)
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{
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/* Some drivers (RTC) may need i2c */
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BSP_i2c_initialize();
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}
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/*
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* bsp_start
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*
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* This routine does the bulk of the system initialization.
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*/
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#include <libcpu/spr.h>
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SPR_RW(HID1)
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void bsp_start( void )
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{
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unsigned char *stack;
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uint32_t intrStackStart;
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uint32_t intrStackSize;
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unsigned char *work_space_start;
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char *chpt;
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ppc_cpu_id_t myCpu;
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ppc_cpu_revision_t myCpuRevision;
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int i;
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E500_tlb_va_cache_t *tlb;
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VpdBufRec vpdData [] = {
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{ key: ProductIdent, instance: 0, buf: BSP_productIdent, buflen: sizeof(BSP_productIdent) - 1 },
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{ key: SerialNumber, instance: 0, buf: BSP_serialNumber, buflen: sizeof(BSP_serialNumber) - 1 },
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{ key: BusClockHz, instance: 0, buf: &BSP_pci_bus_frequency, buflen: sizeof(BSP_pci_bus_frequency) },
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{ key: EthernetAddr, instance: 0, buf: BSP_enetAddr0, buflen: sizeof(BSP_enetAddr0) },
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{ key: EthernetAddr, instance: 1, buf: BSP_enetAddr1, buflen: sizeof(BSP_enetAddr1) },
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{ key: EthernetAddr, instance: 2, buf: BSP_enetAddr2, buflen: sizeof(BSP_enetAddr2) },
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VPD_END
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};
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/* Intersperse messages with actions to help locate problems */
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printk("-----------------------------------------\n");
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/*
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* Get CPU identification dynamically. Note that the get_ppc_cpu_type()
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* function store the result in global variables so that it can be used
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* later...
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*/
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myCpu = get_ppc_cpu_type();
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myCpuRevision = get_ppc_cpu_revision();
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printk("Welcome to %s\n", _RTEMS_version);
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printk("BSP: %s, CVS Release ($Name$)\n", "mvme3100");
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/*
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* the initial stack has aready been set to this value in start.S
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* so there is no need to set it in r1 again... It is just for info
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* so that It can be printed without accessing R1.
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*/
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asm volatile("mr %0, 1":"=r"(stack));
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#if 0
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stack = ((unsigned char*) __rtems_end) +
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INIT_STACK_SIZE - PPC_MINIMUM_STACK_FRAME_SIZE;
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#endif
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/* tag the bottom */
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*((uint32_t*)stack) = 0;
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/*
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* Initialize the interrupt related settings.
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*/
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intrStackStart = (uint32_t) __rtems_end + INIT_STACK_SIZE;
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intrStackSize = INTR_STACK_SIZE;
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BSP_heap_start = intrStackStart + intrStackSize;
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/*
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* Initialize default raw exception handlers.
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*/
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ppc_exc_initialize(
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PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
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intrStackStart,
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intrStackSize
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);
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printk("CPU 0x%x - rev 0x%x\n", myCpu, myCpuRevision);
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#ifdef SHOW_MORE_INIT_SETTINGS
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printk("Additionnal boot options are %s\n", BSP_commandline_string);
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printk("Initial system stack at %x\n", stack);
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printk("Software IRQ stack starts at %x with size %u\n", intrStackStart, intrStackSize);
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#endif
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#ifdef SHOW_MORE_INIT_SETTINGS
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printk("Going to start PCI buses scanning and initialization\n");
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#endif
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BSP_mem_size = BSP_get_mem_size();
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{
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/* memory-select errors were disabled in 'start.S';
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* motload has all TLBs mapping a possible larger area as
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* memory (not-guarded, caching-enabled) than actual physical
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* memory is available.
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* In case of speculative loads this may cause 'memory-select' errors
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* which seem to raise 'core_fault_in' (found no description in
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* the manual but I experienced this problem).
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* Such errors (if HID1[RFXE] is clear) may *stall* execution
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* leading to mysterious 'hangs'.
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*
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* Here we remove all mappings, re-enable memory-select
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* errors and make sure we enable HID1[RFXE] to avoid
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* stalls (since we don't implement handling individual
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* error-handling interrupts).
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*/
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/* enable machine check for bad bus errors */
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_write_HID1( _read_HID1() | 0x20000 );
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rtems_e500_initlb();
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for ( i=0, tlb=rtems_e500_tlb_va_cache; i<NumberOf(rtems_e500_tlb_va_cache); i++, tlb++ ) {
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/* disable TLBs for caching-enabled, non-guarded areas
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* beyond physical memory
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*/
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if ( tlb->att.v
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&& 0xa != (tlb->att.wimge & 0xa)
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&& (tlb->va.va_epn<<12) >= BSP_mem_size ) {
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rtems_e500_clrtlb( E500_SELTLB_1 | i );
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}
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}
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/* clear all pending memory errors */
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_ccsr_wr32(0x2e40, 0xffffffff);
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/* enable checking for memory-select errors */
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_ccsr_wr32(0x2e44, _ccsr_rd32(0x2e44) & ~1 );
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}
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printk("Build Date: %s\n",BSP_build_date);
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BSP_vpdRetrieveFields( vpdData );
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printk("Board Type: %s (S/N %s)\n",
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BSP_productIdent[0] ? BSP_productIdent : "n/a",
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BSP_serialNumber[0] ? BSP_serialNumber : "n/a");
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printk("External (=PCI Bus) Clock Freq ");
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if ( 0xdeadbeef == BSP_pci_bus_frequency ) {
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BSP_pci_bus_frequency = 66666666;
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printk(" NOT FOUND in VPD; using %10u Hz\n",
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BSP_pci_bus_frequency);
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} else {
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printk(": %10u Hz\n",
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BSP_pci_bus_frequency);
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}
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/* Calculate CPU and CCB bus freqs */
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BSP_calc_freqs();
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pci_initialize();
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prether(BSP_enetAddr0, 0);
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prether(BSP_enetAddr1, 1);
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prether(BSP_enetAddr2, 2);
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/* need to tweak the motload setup */
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BSP_motload_pci_fixup();
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#ifdef SHOW_MORE_INIT_SETTINGS
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printk("Number of PCI buses found is : %d\n", pci_bus_count());
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{
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void BSP_pciConfigDump_early();
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BSP_pciConfigDump_early();
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}
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#endif
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if ( (chpt = strstr(BSP_commandline_string,"MEMSZ=")) ) {
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char *endp;
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uint32_t sz;
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chpt+=6 /* strlen("MEMSZ=") */;
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sz = strtoul(chpt, &endp, 0);
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if ( endp != chpt )
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BSP_mem_size = sz;
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}
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printk("Memory: %10u bytes\n", BSP_mem_size);
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BSP_bus_frequency = 333333333;
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BSP_processor_frequency = 833333333;
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BSP_time_base_divisor = 8000; /* if external RTC clock unused (HID0) */
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/* clear hostbridge errors but leave MCP disabled -
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* PCI config space scanning code will trip otherwise :-(
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*/
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_BSP_clear_hostbridge_errors(0 /* enableMCP */, 0/*quiet*/);
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/*
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* Set up our hooks
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* Make sure libc_init is done before drivers initialized so that
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* they can use atexit()
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*/
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bsp_clicks_per_usec = BSP_bus_frequency/(BSP_time_base_divisor * 1000);
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#ifdef SHOW_MORE_INIT_SETTINGS
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printk("Configuration.work_space_size = %x\n",
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Configuration.work_space_size);
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#endif
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work_space_start =
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(unsigned char *)BSP_mem_size - Configuration.work_space_size;
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if ( work_space_start <=
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((unsigned char *)__rtems_end) + INIT_STACK_SIZE + INTR_STACK_SIZE) {
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printk( "bspstart: Not enough RAM!!!\n" );
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bsp_cleanup();
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}
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Configuration.work_space_start = work_space_start;
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/*
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* Initalize RTEMS IRQ system
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*/
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BSP_rtems_irq_mng_init(0);
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if (1) {
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int i;
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unsigned msr,tcr;
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asm volatile("mfmsr %0":"=r"(msr));
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asm volatile("mftcr %0":"=r"(tcr));
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printk("MSR is 0x%08x, TCR 0x%08x\n",msr,tcr);
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asm volatile("mttcr %0"::"r"(0));
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if (0) {
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asm volatile("mtmsr %0"::"r"(msr|0x8000));
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for (i=0; i<12; i++)
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BSP_enable_irq_at_pic(i);
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printk("IRQS enabled\n");
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}
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}
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if (0) {
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extern unsigned ppc_exc_lock_std, ppc_exc_gpr3_std;
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unsigned x;
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asm volatile("mfivpr %0":"=r"(x));
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printk("IVPR: 0x%08x\n",x);
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asm volatile("mfivor8 %0":"=r"(x));
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printk("IVOR8: 0x%08x\n",x);
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printk("0x%08x\n",*(unsigned *)0xc00);
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printk("0x%08x\n",*(unsigned *)0xc04);
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printk("0x%08x\n",*(unsigned *)0xc08);
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printk("0x%08x\n\n\n",*(unsigned *)0xc0c);
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if (0) {
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*(unsigned *)0xc08 = 0x4c000064;
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asm volatile("dcbf 0, %0; icbi 0, %0; sync; isync"::"r"(0xc00));
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}
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printk("0x%08x\n", ppc_exc_lock_std);
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printk("0x%08x\n", ppc_exc_gpr3_std);
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asm volatile("sc");
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printk("0x%08x\n", ppc_exc_lock_std);
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printk("0x%08x\n", ppc_exc_gpr3_std);
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}
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printk("-----------------------------------------\n");
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#ifdef SHOW_MORE_INIT_SETTINGS
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printk("Exit from bspstart\n");
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#endif
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}
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