forked from Imagelibrary/rtems
104 lines
3.7 KiB
C
104 lines
3.7 KiB
C
/* GR-RASTA-TMTC PCI Target driver.
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*
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* COPYRIGHT (c) 2008.
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* Cobham Gaisler AB.
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*
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* Configures the GR-RASTA-TMTC interface PCI board.
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* This driver provides a AMBA PnP bus by using the general part
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* of the AMBA PnP bus driver (ambapp_bus.c).
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*
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* Driver resources for the AMBA PnP bus provided can be set using
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* gr_rasta_tmtc_set_resources().
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*
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* The license and distribution terms for this file may be
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* found in found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#ifndef __GR_RASTA_TMTC_H__
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#define __GR_RASTA_TMTC_H__
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#include <drvmgr/drvmgr.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* GPIO TM/TC configuration pin definitions
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* --31 PWRX (1=PW2APB, 0=TM VC3/4)
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* --30 PWTC (1=APB2PW, 0=TC MAP1/2)
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* --29 Redundant TM (1=enable, 0=disable)
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* --28 Redundant TC (1=enable, 0=disable)
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* --27 Select TM output (1=GRTM, 0=PTME)
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* --26 Loop back PW (1=enable, 0=disable)
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* --25 Transponder clock (1=PLL, 0=PLL bypass)
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* --24 PWTX-SELECT (0=TX0-0, 1=TX0-1)
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* --23 PDEC Map Switch (1=on, 0=off)
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* --22 PDEC Ext CPDU (1=on, 0=off)
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* --21 PDEC Super User (1=on, 0=off)
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* --20 PDEC RM On (1=on, 0=off)
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* --19 PDEC AU Enable (1=on, 0=off)
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* --18 PDEC Dynamic Mode (1=on, 0=off)
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* --17 PDEC Priority (1=on, 0=off)
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* --16 TC PSS Support (1=on, 0=off)
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* --15 TC Mark (1=on, 0=off)
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* --14 TC Pseudo (1=on, 0=off)
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* --13 TC Rising Clock (1=rise, 0=fall)
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* --12 TC Active High (1=high, 0=low)
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* --11 Bit Lock Positive (1=high, 0=low)
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* --10 RF Avail Positive (1=high, 0=low)
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* -- 9 : 0 SpaceCraft ID
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*/
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#define GR_TMTC_GPIO_PWRX (1<<31)
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#define GR_TMTC_GPIO_PWTC (1<<30)
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#define GR_TMTC_GPIO_RED_TM (1<<29)
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#define GR_TMTC_GPIO_RED_TC (1<<28)
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#define GR_TMTC_GPIO_GRTM_SEL (1<<27)
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#define GR_TMTC_GPIO_LB_PW (1<<26)
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#define GR_TMTC_GPIO_TRANSP_CLK (1<<25)
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#define GR_TMTC_GPIO_PWTX_SEL (1<<24)
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#define GR_TMTC_GPIO_PDEC_MAP (1<<23)
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#define GR_TMTC_GPIO_PDEC_CPDU (1<<22)
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#define GR_TMTC_GPIO_PDEC_SU (1<<21)
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#define GR_TMTC_GPIO_PDEC_RM (1<<20)
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#define GR_TMTC_GPIO_PDEC_AU (1<<19)
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#define GR_TMTC_GPIO_PDEC_DYN_MODE (1<<18)
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#define GR_TMTC_GPIO_PDEC_PRIO (1<<17)
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#define GR_TMTC_GPIO_TC_PSS (1<<16)
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#define GR_TMTC_GPIO_TC_MARK (1<<15)
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#define GR_TMTC_GPIO_TC_PSEUDO (1<<14)
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#define GR_TMTC_GPIO_TC_RISING_CLK (1<<13)
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#define GR_TMTC_GPIO_TC_ACTIVE_HIGH (1<<12)
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#define GR_TMTC_GPIO_TC_BIT_LOCK (1<<11)
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#define GR_TMTC_GPIO_TC_RF_AVAIL (1<<10)
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#define GR_TMTC_GPIO_SCID (0x000003ff)
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/* An array of pointers to GR-RASTA-TMTC bus resources. The resources will be
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* used by the device drivers controlling the cores on the GR-RASTA-IO target
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* AMBA bus.
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*
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* The array is defined weak, and defaults to no resources. The array must be
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* terminated with a NULL resource.
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*/
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extern struct drvmgr_bus_res *gr_rasta_tmtc_resources[];
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/* Options to gr_rasta_io_print function */
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#define RASTA_TMTC_OPTIONS_AMBA 0x01 /* Print AMBA bus devices */
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#define RASTA_TMTC_OPTIONS_IRQ 0x02 /* Print current IRQ setup */
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/* Print information about GR-RASTA-TMTC PCI boards */
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void gr_rasta_tmtc_print(int options);
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/* Print information about a GR-RASTA-TMTC PCI boards */
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void gr_rasta_tmtc_print_dev(struct drvmgr_dev *dev, int options);
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/* Register GR-RASTA-TMTC driver */
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void gr_rasta_tmtc_register_drv(void);
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#ifdef __cplusplus
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}
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#endif
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#endif
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