forked from Imagelibrary/rtems
573a7202e6
This implementation disables the MMU during the modification of the translation table. This behaviour is required by boot loaders for these boards.
90 lines
2.6 KiB
C
90 lines
2.6 KiB
C
/* SPDX-License-Identifier: BSD-2-Clause */
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/**
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* @file
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*
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* @ingroup lpc32xx_mmu
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*
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* @brief MMU support API.
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*/
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/*
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* Copyright (C) 2009, 2011 embedded brains GmbH & Co. KG
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef LIBBSP_ARM_LPC32XX_MMU_H
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#define LIBBSP_ARM_LPC32XX_MMU_H
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#include <libcpu/arm-cp15.h>
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#ifdef __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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/**
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* @defgroup lpc32xx_mmu MMU Support
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*
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* @ingroup RTEMSBSPsARMLPC32XX
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*
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* @brief MMU support.
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*
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* @{
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*/
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#define LPC32XX_MMU_CLIENT_DOMAIN 15U
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#define LPC32XX_MMU_READ_ONLY \
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((LPC32XX_MMU_CLIENT_DOMAIN << ARM_MMU_SECT_DOMAIN_SHIFT) \
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| ARM_MMU_SECT_DEFAULT)
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#define LPC32XX_MMU_READ_ONLY_CACHED \
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(LPC32XX_MMU_READ_ONLY | ARM_MMU_SECT_C | ARM_MMU_SECT_B)
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#define LPC32XX_MMU_READ_WRITE \
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((LPC32XX_MMU_CLIENT_DOMAIN << ARM_MMU_SECT_DOMAIN_SHIFT) \
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| ARM_MMU_SECT_AP_0 \
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| ARM_MMU_SECT_DEFAULT)
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#define LPC32XX_MMU_READ_WRITE_CACHED \
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(LPC32XX_MMU_READ_WRITE | ARM_MMU_SECT_C | ARM_MMU_SECT_B)
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/**
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* @brief Sets the @a section_flags for the address range [@a begin, @a end).
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*
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* @return Previous section flags of the first modified entry.
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*/
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uint32_t lpc32xx_set_translation_table_entries(
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const void *begin,
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const void *end,
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uint32_t section_flags
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);
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/** @} */
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#ifdef __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* LIBBSP_ARM_LPC32XX_MMU_H */
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