forked from Imagelibrary/rtems
63 lines
2.1 KiB
C
63 lines
2.1 KiB
C
/* SPDX-License-Identifier: BSD-2-Clause */
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/**
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* @file
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*
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* @ingroup RTEMSBSPsARMZynq
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*
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* @brief This source file contains the implementation of bsp_start_hook_0()
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* and bsp_start_hook_1().
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*/
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/*
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* Copyright (C) 2013, 2014 embedded brains GmbH & Co. KG
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#define ARM_CP15_TEXT_SECTION BSP_START_TEXT_SECTION
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#include <bsp.h>
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#include <bsp/start.h>
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#include <bsp/arm-a9mpcore-start.h>
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BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
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{
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arm_a9mpcore_start_hook_0();
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}
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BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
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{
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arm_a9mpcore_start_hook_1();
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bsp_start_copy_sections();
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zynq_setup_mmu_and_cache();
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#if !defined(RTEMS_SMP) \
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&& (defined(BSP_DATA_CACHE_ENABLED) \
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|| defined(BSP_INSTRUCTION_CACHE_ENABLED))
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/* Enable unified L2 cache */
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rtems_cache_enable_data();
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#endif
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bsp_start_clear_bss();
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}
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