forked from Imagelibrary/rtems
135 lines
4.2 KiB
C
135 lines
4.2 KiB
C
/* SPDX-License-Identifier: BSD-2-Clause */
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/**
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* @file
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*
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* @ingroup RTEMSBSPsARMShared
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*
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* @brief Create #defines which state which erratas shall get applied
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*/
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/*
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* Copyright (c) 2014 embedded brains GmbH & Co. KG
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef ARM_ERRATA_H_
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#define ARM_ERRATA_H_
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#include <bsp/arm-release-id.h>
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#include <libcpu/arm-cp15.h>
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#ifdef __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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static inline arm_release_id arm_errata_get_processor_release(void)
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{
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const uint32_t MIDR = arm_cp15_get_id_code();
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const uint8_t REVISION = (MIDR & 0xF00000U) >> 20;
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const uint8_t PATCH_LEVEL = (MIDR & 0xFU);
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return ARM_RELEASE_ID_FROM_NUMBER_AND_PATCH_LEVEL(
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REVISION,
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PATCH_LEVEL
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);
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}
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static inline bool arm_errata_is_applicable_processor_errata_764369(void)
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{
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#if defined(RTEMS_SMP)
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const arm_release_id RELEASE = arm_errata_get_processor_release();
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bool is_applicable = false;
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/* Errata information for Cortex-A9 processors.
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* Information taken from ARMs
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* "Cortex-A series processors
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* - Cortex-A9
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* - Software Developers Errata Notice
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* - Revision r4 revisions
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* - ARM Cortex-A9 processors r4 release Software Developers Errata Notice"
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* The corresponding link is: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0360f/BABJFIBA.html
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* Please see this document for more information on these erratas */
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switch( RELEASE ) {
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case ARM_RELEASE_ID_R4_P1:
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case ARM_RELEASE_ID_R4_P4:
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case ARM_RELEASE_ID_R3_P0:
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case ARM_RELEASE_ID_R2_P10:
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case ARM_RELEASE_ID_R2_P8:
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case ARM_RELEASE_ID_R2_P6:
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case ARM_RELEASE_ID_R2_P4:
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case ARM_RELEASE_ID_R2_P3:
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case ARM_RELEASE_ID_R2_P2:
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case ARM_RELEASE_ID_R2_P0:
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is_applicable = true;
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break;
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default:
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is_applicable = false;
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break;
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}
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return is_applicable;
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#else
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return false;
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#endif
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}
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static inline bool arm_errata_is_applicable_processor_errata_775420(void)
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{
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const arm_release_id RELEASE = arm_errata_get_processor_release();
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bool is_applicable = false;
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/* Errata information for Cortex-A9 processors.
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* Information taken from ARMs
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* "Cortex-A series processors
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* - Cortex-A9
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* - Software Developers Errata Notice
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* - Revision r4 revisions
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* - ARM Cortex-A9 processors r4 release Software Developers Errata Notice"
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* The corresponding link is: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0360f/BABJFIBA.html
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* Please see this document for more information on these erratas */
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switch( RELEASE ) {
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case ARM_RELEASE_ID_R2_P10:
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case ARM_RELEASE_ID_R2_P8:
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case ARM_RELEASE_ID_R2_P6:
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case ARM_RELEASE_ID_R2_P4:
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case ARM_RELEASE_ID_R2_P3:
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case ARM_RELEASE_ID_R2_P2:
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is_applicable = true;
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break;
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default:
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is_applicable = false;
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break;
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}
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return is_applicable;
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}
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#ifdef __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* ARM_ERRATA_H_ */
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