forked from Imagelibrary/rtems
9964895866
Adjust build support files to new directory layout. This patch is a part of the BSP source reorganization. Update #3285.
97 lines
2.4 KiB
C
97 lines
2.4 KiB
C
/*
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* Atmel AT91RM9200 PMC functions
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*
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* Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com>
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#include <rtems.h>
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#include <bsp.h>
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#include <at91rm9200.h>
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#include <at91rm9200_pmc.h>
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int at91rm9200_get_mainclk(void)
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{
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return BSP_MAIN_FREQ;
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}
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int at91rm9200_get_slck(void)
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{
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return BSP_SLCK_FREQ;
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}
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int at91rm9200_get_mck(void)
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{
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uint32_t mck_reg;
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uint32_t mck_freq = 0; /* to avoid warnings */
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uint32_t pll_reg;
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int prescaler = 0; /* to avoid warnings */
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mck_reg = PMC_REG(PMC_MCKR);
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switch(mck_reg & PMC_MCKR_PRES_MASK) {
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case PMC_MCKR_PRES_1:
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prescaler = 1;
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break;
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case PMC_MCKR_PRES_2:
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prescaler = 2;
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break;
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case PMC_MCKR_PRES_4:
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prescaler = 4;
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break;
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case PMC_MCKR_PRES_8:
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prescaler = 8;
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break;
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case PMC_MCKR_PRES_16:
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prescaler = 16;
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break;
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case PMC_MCKR_PRES_32:
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prescaler = 32;
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break;
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case PMC_MCKR_PRES_64:
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prescaler = 64;
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break;
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}
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/* Let's find out what MCK's source is */
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switch (mck_reg & PMC_MCKR_CSS_MASK) {
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case PMC_MCKR_CSS_SLOW:
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/* I'm assuming the slow clock is 32.768 MHz */
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mck_freq = at91rm9200_get_slck() / prescaler;
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break;
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case PMC_MCKR_CSS_MAIN:
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mck_freq = at91rm9200_get_mainclk() / prescaler;
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break;
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case PMC_MCKR_CSS_PLLA:
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pll_reg = PMC_REG(PMC_PLLAR);
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mck_freq = at91rm9200_get_mainclk() / prescaler;
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mck_freq = mck_freq / (pll_reg & PMC_PLLAR_DIV_MASK);
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mck_freq = mck_freq * (((pll_reg & PMC_PLLAR_MUL_MASK) >> 16) + 1);
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break;
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case PMC_MCKR_CSS_PLLB:
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pll_reg = PMC_REG(PMC_PLLBR);
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mck_freq = at91rm9200_get_mainclk() / prescaler;
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mck_freq = mck_freq / (pll_reg & PMC_PLLBR_DIV_MASK);
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mck_freq = mck_freq * (((pll_reg & PMC_PLLBR_MUL_MASK) >> 16) + 1);
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break;
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}
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if ((mck_reg & PMC_MCKR_MDIV_MASK) == PMC_MCKR_MDIV_2) {
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mck_freq = mck_freq / 2;
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} else if ((mck_reg & PMC_MCKR_MDIV_MASK) == PMC_MCKR_MDIV_3) {
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mck_freq = mck_freq / 3;
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} else if ((mck_reg & PMC_MCKR_MDIV_MASK) == PMC_MCKR_MDIV_4) {
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mck_freq = mck_freq / 4;
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}
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return mck_freq;
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}
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