forked from Imagelibrary/rtems
113 lines
4.3 KiB
Perl
113 lines
4.3 KiB
Perl
@c
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@c COPYRIGHT (c) 1988-1998.
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@c On-Line Applications Research Corporation (OAR).
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@c All rights reserved.
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@c
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@c $Id$
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@c
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@ifinfo
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@node Board Support Packages, Board Support Packages Introduction, Default Fatal Error Processing Default Fatal Error Handler Operations, Top
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@end ifinfo
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@chapter Board Support Packages
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@ifinfo
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@menu
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* Board Support Packages Introduction::
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* Board Support Packages System Reset::
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* Board Support Packages Processor Initialization::
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@end menu
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@end ifinfo
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@ifinfo
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@node Board Support Packages Introduction, Board Support Packages System Reset, Board Support Packages, Board Support Packages
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@end ifinfo
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@section Introduction
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An RTEMS Board Support Package (BSP) must be designed
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to support a particular processor and target board combination.
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This chapter presents a discussion of i386 specific BSP issues.
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For more information on developing a BSP, refer to the chapter
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titled Board Support Packages in the RTEMS
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Applications User's Guide.
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@ifinfo
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@node Board Support Packages System Reset, Board Support Packages Processor Initialization, Board Support Packages Introduction, Board Support Packages
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@end ifinfo
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@section System Reset
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An RTEMS based application is initiated when the i386
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processor is reset. When the i386 is reset,
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@itemize @bullet
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@item The EAX register is set to indicate the results of the
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processor's power-up self test. If the self-test was not
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executed, the contents of this register are undefined.
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Otherwise, a non-zero value indicates the processor is faulty
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and a zero value indicates a successful self-test.
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@item The DX register holds a component identifier and
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revision level. DH contains 3 to indicate an i386 component and
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DL contains a unique revision level indicator.
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@item Control register zero (CR0) is set such that the
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processor is in real mode with paging disabled. Other portions
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of CR0 are used to indicate the presence of a numeric
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coprocessor.
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@item All bits in the extended flags register (EFLAG) which
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are not permanently set are cleared. This inhibits all maskable
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interrupts.
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@item The Interrupt Descriptor Register (IDTR) is set to point
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at address zero.
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@item All segment registers are set to zero.
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@item The instruction pointer is set to 0x0000FFF0. The
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first instruction executed after a reset is actually at
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0xFFFFFFF0 because the i386 asserts the upper twelve address
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until the first intersegment (FAR) JMP or CALL instruction.
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When a JMP or CALL is executed, the upper twelve address lines
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are lowered and the processor begins executing in the first
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megabyte of memory.
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@end itemize
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Typically, an intersegment JMP to the application's
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initialization code is placed at address 0xFFFFFFF0.
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@ifinfo
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@node Board Support Packages Processor Initialization, Processor Dependent Information Table, Board Support Packages System Reset, Board Support Packages
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@end ifinfo
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@section Processor Initialization
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This initialization code is responsible for
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initializing all data structures required by the i386 in
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protected mode and for actually entering protected mode. The
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i386 must be placed in protected mode and the segment registers
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and associated selectors must be initialized before the
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initialize_executive directive is invoked.
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The initialization code is responsible for
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initializing the Global Descriptor Table such that the i386 is
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in the thirty-two bit flat memory model with paging disabled.
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In this mode, the i386 automatically converts every address from
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a logical to a physical address each time it is used. For more
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information on the memory model used by RTEMS, please refer to
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the Memory Model chapter in this document.
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If the application requires that the IDTR be some
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value besides zero, then it should set it to the required value
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at this point. All tasks share the same i386 IDTR value.
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Because interrupts are enabled automatically by RTEMS as part of
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the initialize_executive directive, the IDTR MUST be set
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properly before this directive is invoked to insure correct
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interrupt vectoring. If processor caching is to be utilized,
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then it should be enabled during the reset application
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initialization code. The reset code which is executed before
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the call to initialize_executive has the following requirements:
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For more information regarding the i386s data
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structures and their contents, refer to Intel's 386
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Programmer's Reference Manual.
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