forked from Imagelibrary/rtems
154 lines
4.1 KiB
C
154 lines
4.1 KiB
C
/* SPDX-License-Identifier: BSD-2-Clause */
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/**
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* @file
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*
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* @ingroup RTEMSBSPsARMLPC32XX
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*
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* @brief System clocks.
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*/
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/*
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* Copyright (c) 2011 embedded brains GmbH & Co. KG
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <bsp.h>
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#include <bsp/lpc32xx.h>
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uint32_t lpc32xx_sysclk(void)
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{
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uint32_t sysclk_ctrl = LPC32XX_SYSCLK_CTRL;
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return (sysclk_ctrl & 0x1) == 0 ?
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LPC32XX_OSCILLATOR_MAIN
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: (397 * LPC32XX_OSCILLATOR_RTC);
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}
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uint32_t lpc32xx_hclkpll_clk(void)
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{
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uint32_t sysclk = lpc32xx_sysclk();
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uint32_t hclkpll_ctrl = LPC32XX_HCLKPLL_CTRL;
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uint32_t m = HCLK_PLL_M_GET(hclkpll_ctrl) + 1;
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uint32_t n = HCLK_PLL_N_GET(hclkpll_ctrl) + 1;
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uint32_t p = 1U << HCLK_PLL_P_GET(hclkpll_ctrl);
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uint32_t hclkpll_clk = 0;
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if ((hclkpll_ctrl & HCLK_PLL_BYPASS) != 0) {
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if ((hclkpll_ctrl & HCLK_PLL_DIRECT) != 0) {
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hclkpll_clk = sysclk;
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} else {
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hclkpll_clk = sysclk / (2 * p);
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}
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} else {
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if ((hclkpll_ctrl & HCLK_PLL_DIRECT) != 0) {
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hclkpll_clk = (m * sysclk) / n;
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} else {
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if ((hclkpll_ctrl & HCLK_PLL_FBD_FCLKOUT) != 0) {
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hclkpll_clk = m * (sysclk / n);
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} else {
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hclkpll_clk = (m / (2 * p)) * (sysclk / n);
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}
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}
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}
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return hclkpll_clk;
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}
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uint32_t lpc32xx_periph_clk(void)
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{
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uint32_t pwr_ctrl = LPC32XX_PWR_CTRL;
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uint32_t periph_clk = 0;
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if ((pwr_ctrl & PWR_NORMAL_RUN_MODE) != 0) {
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uint32_t hclkdiv_ctrl = LPC32XX_HCLKDIV_CTRL;
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uint32_t div = HCLK_DIV_PERIPH_CLK_GET(hclkdiv_ctrl) + 1;
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periph_clk = lpc32xx_hclkpll_clk() / div;
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} else {
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periph_clk = lpc32xx_sysclk();
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}
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return periph_clk;
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}
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uint32_t lpc32xx_hclk(void)
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{
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uint32_t pwr_ctrl = LPC32XX_PWR_CTRL;
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uint32_t hclk = 0;
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if ((pwr_ctrl & PWR_HCLK_USES_PERIPH_CLK) != 0) {
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hclk = lpc32xx_periph_clk();
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} else {
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if ((pwr_ctrl & PWR_NORMAL_RUN_MODE) != 0) {
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uint32_t hclkdiv_ctrl = LPC32XX_HCLKDIV_CTRL;
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uint32_t div = 1U << HCLK_DIV_HCLK_GET(hclkdiv_ctrl);
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hclk = lpc32xx_hclkpll_clk() / div;
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} else {
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hclk = lpc32xx_sysclk();
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}
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}
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return hclk;
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}
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uint32_t lpc32xx_arm_clk(void)
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{
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uint32_t pwr_ctrl = LPC32XX_PWR_CTRL;
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uint32_t arm_clk = 0;
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if ((pwr_ctrl & PWR_HCLK_USES_PERIPH_CLK) != 0) {
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arm_clk = lpc32xx_periph_clk();
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} else {
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if ((pwr_ctrl & PWR_NORMAL_RUN_MODE) != 0) {
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arm_clk = lpc32xx_hclkpll_clk();
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} else {
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arm_clk = lpc32xx_sysclk();
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}
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}
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return arm_clk;
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}
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uint32_t lpc32xx_ddram_clk(void)
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{
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uint32_t hclkdiv_ctrl = LPC32XX_HCLKDIV_CTRL;
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uint32_t div = HCLK_DIV_DDRAM_CLK_GET(hclkdiv_ctrl);
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uint32_t ddram_clk = 0;
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if (div != 0) {
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uint32_t pwr_ctrl = LPC32XX_PWR_CTRL;
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if ((pwr_ctrl & PWR_NORMAL_RUN_MODE) != 0) {
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ddram_clk = lpc32xx_hclkpll_clk();
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} else {
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ddram_clk = lpc32xx_sysclk();
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}
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ddram_clk /= div;
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}
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return ddram_clk;
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}
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