forked from Imagelibrary/rtems
2afb22b7e1
A speciality of the RTEMS build system was the make preinstall step. It copied header files from arbitrary locations into the build tree. The header files were included via the -Bsome/build/tree/path GCC command line option. This has at least seven problems: * The make preinstall step itself needs time and disk space. * Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error. * There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult. * The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit. * An introduction of a new build system is difficult. * Include paths specified by the -B option are system headers. This may suppress warnings. * The parallel build had sporadic failures on some hosts. This patch removes the make preinstall step. All installed header files are moved to dedicated include directories in the source tree. Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc, etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g. erc32, imx, qoriq, etc. The new cpukit include directories are: * cpukit/include * cpukit/score/cpu/@RTEMS_CPU@/include * cpukit/libnetworking The new BSP include directories are: * bsps/include * bsps/@RTEMS_CPU@/include * bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include There are build tree include directories for generated files. The include directory order favours the most general header file, e.g. it is not possible to override general header files via the include path order. The "bootstrap -p" option was removed. The new "bootstrap -H" option should be used to regenerate the "headers.am" files. Update #3254.
100 lines
4.4 KiB
C
100 lines
4.4 KiB
C
/* $NetBSD: gtpcireg.h,v 1.2 2003/03/24 17:03:18 matt Exp $ */
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/*
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* Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Allegro Networks, Inc., and Wasabi Systems, Inc.
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* 4. The name of Allegro Networks, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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* 5. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY ALLEGRO NETWORKS, INC. AND
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* WASABI SYSTEMS, INC. ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
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* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
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* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL EITHER ALLEGRO NETWORKS, INC. OR WASABI SYSTEMS, INC.
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#define PCI_ARBCTL_EN (1<<31)
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#define PCI_COMMAND_SB_DIS 0x2000 /* PCI configuration read will stop
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* acting as sync barrier transactin
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*/
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#define PCI_MEM_BASE_ADDR PCI_BASE_ADDRESS_4
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#define PCI_IO_BASE_ADDR PCI_BASE_ADDRESS_5
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#define PCI_STATUS_CLRERR_MASK 0xf9000000 /* <SKF> */
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#define PCI_BARE_IntMemEn 0x200
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#define PCI_ACCCTLBASEL_PrefetchEn 0x0001000
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#define PCI_ACCCTLBASEL_RdPrefetch 0x0010000
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#define PCI_ACCCTLBASEL_RdLinePrefetch 0x0020000
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#define PCI_ACCCTLBASEL_RdMulPrefetch 0x0040000
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#define PCI_ACCCTLBASEL_WBurst_8_QW 0x0100000
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#define PCI_ACCCTLBASEL_PCISwap_NoSwap 0x1000000
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#define PCI0_P2P_CONFIG 0x1d14
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#define PCI_SNOOP_BASE0_LOW 0x1f00
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#define PCI_SNOOP_BASE0_HIGH 0x1f04
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#define PCI_SNOOP_TOP0 0x1f08
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#define PCI0_SCS0_BAR_SIZE 0x0c08
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#define PCI0_SCS1_BAR_SIZE 0x0d08
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#define PCI0_SCS2_BAR_SIZE 0x0c0c
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#define PCI0_SCS3_BAR_SIZE 0x0d0c
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#define PCI0_BASE_ADDR_REG_ENABLE 0x0c3c
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#define PCI0_ARBITER_CNTL 0x1d00
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#define PCI0_ACCESS_CNTL_BASE0_LOW 0x1e00
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#define PCI0_ACCESS_CNTL_BASE0_HIGH 0x1e04
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#define PCI0_ACCESS_CNTL_BASE0_TOP 0x1e08
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#define PCI0_ACCESS_CNTL_BASE1_LOW 0x1e10
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#define PCI0_ACCESS_CNTL_BASE1_HIGH 0x1e14
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#define PCI0_ACCESS_CNTL_BASE1_TOP 0x1e18
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#define PCI1_BASE_ADDR_REG_ENABLE 0x0cbc
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#define PCI1_ARBITER_CNTL 0x1d80
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#define PCI1_ACCESS_CNTL_BASE0_LOW 0x1e80
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#define PCI1_ACCESS_CNTL_BASE0_HIGH 0x1e84
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#define PCI1_ACCESS_CNTL_BASE0_TOP 0x1e88
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#define PCI1_ACCESS_CNTL_BASE1_LOW 0x1e90
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#define PCI1_ACCESS_CNTL_BASE1_HIGH 0x1e94
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#define PCI1_ACCESS_CNTL_BASE1_TOP 0x1e98
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#define PCI_SNOOP_BASE1_LOW 0x1f10
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#define PCI_SNOOP_BASE1_HIGH 0x1f14
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#define PCI_SNOOP_TOP1 0x1f18
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#define PCI0_CMD_CNTL 0xc00
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#define PCI1_P2P_CONFIG 0x1d94
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#define PCI1_CMD_CNTL 0xc80
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#define PCI1_CONFIG_ADDR 0xc78
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#define PCI1_CONFIG_DATA 0xc7c
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