forked from Imagelibrary/rtems
33f6e34b2d
This patch changes the license to BSD-2 for all source files where the copyright is held by Aeroflex Gaisler, Cobham Gaisler, or Gaisler Research. Some files also includes copyright right statements from OAR and/or embedded Brains in addition to Gaisler. Updates #3053.
454 lines
15 KiB
C
454 lines
15 KiB
C
/* SPDX-License-Identifier: BSD-2-Clause */
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/* GR1553B RT driver
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*
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* COPYRIGHT (c) 2010.
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* Cobham Gaisler AB.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __GR1553RT_H__
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#define __GR1553RT_H__
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/* CONFIG OPTION: Maximum number of LIST IDs supported.
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* There are two lists per RT subaddress, one for RX one
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* for TX.
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*/
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#define RTLISTID_MAX 64
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/* CONFIG OPTION: Maximum number of Interrupt handlers per device supported
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* max is 256 supported, and minimum is 1.
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*/
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#define RTISR_MAX 64
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/* CONFIG OPTION: Maximum number of transfer (RX/TX) descriptors supported.
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*
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* Set this option to zero to allow flexible number of descriptors,
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* requires dynamically allocation of driver structures.
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*/
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/*#define RTBD_MAX 4096*/
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#define RTBD_MAX 0
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Register GR1553B driver needed by RT driver */
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extern void gr1553rt_register(void);
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struct gr1553rt_list;
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/* Descriptor read/written by hardware.
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*
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* Must be aligned to 16 byte boundary
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*/
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struct gr1553rt_bd {
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volatile unsigned int ctrl; /* 0x00 Control/Status word */
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volatile unsigned int dptr; /* 0x04 Data Pointer */
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volatile unsigned int next; /* 0x08 Next Descriptor in list */
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volatile unsigned int unused; /* 0x0C UNUSED BY HARDWARE */
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};
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/* Sub address table entry, the hardware access */
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struct gr1553rt_sa {
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volatile unsigned int ctrl; /* 0x00 SUBADDRESS CONTROL WORD */
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volatile unsigned int txptr; /* 0x04 TRANSMIT BD POINTER */
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volatile unsigned int rxptr; /* 0x08 RECEIVE BD POINTER */
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volatile unsigned int unused; /* 0x0C UNUSED BY HARDWARE */
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};
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/* Configuration of a RT-SubAddress-List */
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struct gr1553rt_list_cfg {
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unsigned int bd_cnt; /* Number of hw-descriptors in list */
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};
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/* A TX or RX subaddress descriptor list */
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struct gr1553rt_list {
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short listid; /* ID/NUMBER of List. -1 unassigned */
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short subadr; /* SubAddress. -1 when not scheduled */
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void *rt; /* Scheduled on Device */
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struct gr1553rt_list_cfg *cfg; /* List configuration */
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int bd_cnt; /* Number of Descriptors */
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/* !!Must be last in data structure!!
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* !!Array must at least be of length bd_cnt!!
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*/
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unsigned short bds[0]; /* Array of BDIDs */
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};
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/* GR1553B-RT Driver configuration options used when calling gr1553rt_config().
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*
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* Note that if not custom addresses are given the driver will dynamically
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* allocate memory for buffers.
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* Note that if custom addresses with the LSB set, the address will be
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* interpreted as a address accessible by hardware, and translated
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* into an address used by CPU.
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*/
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struct gr1553rt_cfg {
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unsigned char rtaddress; /* RT Address 0..30 */
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/*** MODE CODE CONFIG ***/
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unsigned int modecode; /* Mode codes enable/disable/IRQ/EV-Log.
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* Each modecode has a 2-bit cfg field.
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* See Mode Code Control Register in
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* hardware manual.
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*/
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/*** TIME CONFIG ***/
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unsigned short time_res; /* Time tag resolution in us */
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/*** SUBADDRESS TABLE CONFIG ***/
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void *satab_buffer; /* Optional Custom buffer. Must be
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* At least 16*32 bytes, and be aligned
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* to 10-bit (1KB) boundary. Set to NULL
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* to make driver allocate buffer.
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*/
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/*** EVENT LOG CONFIG ***/
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void *evlog_buffer; /* Optional Custom buffer */
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int evlog_size; /* Length, must be a multiple of 2.
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* If set to ZERO event log is disabled
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*/
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/*** TRANSFER DESCRIPTOR CONFIG ***/
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int bd_count; /* Number of transfer descriptors shared
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* by all RX/TX sub-addresses */
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void *bd_buffer; /* Optional Custom descriptor area.
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* Must hold bd_count*32 bytes.
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* If NULL, descriptors will be
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* allocated dynamically. */
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};
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/* GR1553B-RT status indication, copied from the RT registers and stored
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* here. Used when calling the gr1553rt_status() function.
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*/
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struct gr1553rt_status {
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unsigned int status; /* RT Status word */
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unsigned int bus_status; /* BUS Status */
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unsigned short synctime; /* Time Tag of last sync with data */
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unsigned short syncword; /* Data of last mode code synchronize
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* with data. */
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unsigned short time_res; /* Time resolution (set by config) */
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unsigned short time; /* Current Time Tag */
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};
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/* ISR callback definition for ERRORs detected in the GR1553B-RT interrupt
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* handler.
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*
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* \param err Inidicate Error type. The IRQ flag register bit mask:
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* Bit 9 - RT DMA ERROR
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* Bit 10 - RT Table access error
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* \param data Custom data assigned by user
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*/
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typedef void (*gr1553rt_irqerr_t)(int err, void *data);
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/* ISR callback definition for modecodes that are configured to generate
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* an IRQ. The callback is called from within the GR1553B-RT interrupt
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* handler.
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*
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* \param mcode Mode code that caused this IRQ
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* \param entry The raw Eventlog Entry
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* \param data Custom data assigned by user
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*/
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typedef void (*gr1553rt_irqmc_t)(int mcode, unsigned int entry, void *data);
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/* Transfer ISR callback definition. Called from GR1553B-RT interrupt handler
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* when an interrupt has been generated and a event logged due to a 1553
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* transfer to this RT.
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*
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* \param list List (Subaddress/TransferType) that caused IRQ
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* \param entry The raw Eventlog Entry
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* \param bd_next Next Descriptor-entry index in the list (Subaddress/tr-type)
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* This can be used to process all descriptors upto entry_next.
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* \param data Custom data assigned by user
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*/
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typedef void (*gr1553rt_irq_t)(
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struct gr1553rt_list *list,
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unsigned int entry,
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int bd_next,
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void *data
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);
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/* Configure a list according to configuration. Assign the list
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* to a device, however not to a RT sub address yet. The rt
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* is stored within list.
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*
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* \param rt RT Device driver identification, stored within list.
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* \param list The list to configure
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* \param cfg Configuration for list. Pointer to configuration is
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* stored within list for later use.
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*/
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extern int gr1553rt_list_init
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(
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void *rt,
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struct gr1553rt_list **plist,
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struct gr1553rt_list_cfg *cfg
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);
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/* Assign an Error Interrupt handler. Before the handler is called the
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* RT hardware is stopped/disabled. The handler is optional, if not assigned
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* the ISR will still stop the RT upon error.
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*
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* Errors detected by the interrupt handler:
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* - DMA error
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* - Subaddress table access error
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*
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* \param func ISR called when an error causes an interrupt.
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* \param data Custom data given as an argument when calling ISR
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*/
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extern int gr1553rt_irq_err
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(
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void *rt,
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gr1553rt_irqerr_t func,
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void *data
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);
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/* Assign a ModeCode Interrupt handler callback. Called when a 1553 modecode
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* transfer is logged and cause an IRQ. The modecode IRQ generation is
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* configured from "struct gr1553rt_cfg" when calling gr1553rt_config().
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*
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* \param func ISR called when a modecode causes an interrupt.
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* \param data Custom data given as an argument when calling ISR
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*/
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extern int gr1553rt_irq_mc
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(
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void *rt,
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gr1553rt_irqmc_t func,
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void *data
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);
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/* Assign transfer interrupt handler callback. Called when a RX or TX
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* transfer is logged and cause an interrupt, the function is called
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* from the GR1553B-RT driver's ISR, in interrupt context.
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*
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* The callback can be installed per subaddress and transfer type.
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* Subaddress 0 and 31 are not valid (gr1553rt_irq_mc() for modecodes).
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*
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* \param subadr Select subaddress (1-30)
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* \param tx 1=TX subaddress, 0=RX subaddress
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* \param func ISR called when subaddress of spcified transfer type
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* causes an interrupt.
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* \param data Custom data given as an argument when calling ISR
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*/
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extern int gr1553rt_irq_sa
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(
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void *rt,
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int subadr,
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int tx,
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gr1553rt_irq_t func,
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void *data
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);
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#define GR1553RT_BD_FLAGS_IRQEN (1<<30)
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/* Initialize a descriptor entry in a list. This is typically done
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* prior to scheduling the list.
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*
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* \param entry_no Entry number in list (descriptor index in list)
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* \param flags Enable IRQ when descriptor is accessed by setting
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* argument GR1553RT_BD_FLAGS_IRQEN. Enabling IRQ on a
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* descriptor basis will override SA-table IRQ config.
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* \param dptr Data Pointer to RX or TX operation. The LSB indicate
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* if the address must be translated into Hardware address
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* - this is useful when a buffer close to CPU is used
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* as a data pointer and the RT core is located over PCI.
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* \param next Next Entry in list. Set to 0xffff for end of list. Set
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* 0xfffe for next entry in list, wrap around to entry
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* zero if entry_no is last descriptor in list (circular).
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*/
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extern int gr1553rt_bd_init(
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struct gr1553rt_list *list,
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unsigned short entry_no,
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unsigned int flags,
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uint16_t *dptr,
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unsigned short next
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);
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/* Manipulate/Read Control/Status and Data Pointer words of a buffer descriptor.
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* If status is zero, the control/status word is accessed. If dptr is non-zero
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* the data pointer word is accessed.
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*
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* \param list The list that the descriptor is located at
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*
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* \param entry_no The descriptor number accessed
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*
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* \param status IN/OUT. If zero no effect. If pointer is non-zero the
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* value pointed to:
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* IN: Written to Control/Status
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* OUT: the value of the Control/Status word before writing.
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*
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* \param dptr IN/OUT. If zero no effect. If pointer is non-zero, the
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* value pointed to:
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* IN: non-zero: Descriptor data pointer will be updated with
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* this value. Note that the LSB indicate if the address
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* must be translated into hardware-aware address.
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* OUT: The old data pointer is stored here.
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*/
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extern int gr1553rt_bd_update(
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struct gr1553rt_list *list,
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int entry_no,
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unsigned int *status,
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uint16_t **dptr
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);
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/* Get the next/current descriptor processed of a RT sub-address.
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*
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* \param subadr RT Subaddress
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* \param txeno Pointer to where TX descriptor number is stored.
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* \param rxeno Pointer to where RX descriptor number is stored.
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*/
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extern int gr1553rt_indication(void *rt, int subadr, int *txeno, int *rxeno);
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/* Take a GR1553RT hardware device identified by minor.
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* A pointer is returned that is used internally by the GR1553RT
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* driver, it is used as an input parameter 'rt' to all other
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* functions that manipulate the hardware.
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*
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* This function initializes the RT hardware to a stopped/disable level.
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*/
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extern void *gr1553rt_open(int minor);
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/* Close and stop/disable the RT hardware. */
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extern void gr1553rt_close(void *rt);
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/* Configure the RT. The RT device must be configured once before
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* started. A started RT device can not be configured.
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*
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* \param rt The RT to configure
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* \param cfg Configuration parameters
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*/
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extern int gr1553rt_config(void *rt, struct gr1553rt_cfg *cfg);
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/* Schedule a RX or TX list on a sub address. If a list has already been
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* schduled on the subaddress and on the same transfer type (RX/TX), the
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* old list is replaced with the list given here.
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*
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* \param subadr Subaddress to schedule list on
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* \param tx Subaddress transfer type: 1=TX, 0=RX
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* \param list Preconfigued RT list scheduled
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*/
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extern void gr1553rt_sa_schedule(
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void *rt,
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int subadr,
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int tx,
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struct gr1553rt_list *list
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);
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/* Set SubAdress options. One may for example Enable or Disable a sub
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* address RX and/or TX. See hardware manual for SA-Table configuration
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* options.
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*
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* \param subadr SubAddress to configure
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* \param mask Bit mask of option-bits written to subaddress config
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* \param options The new options written to subaddress config.
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*
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*/
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extern void gr1553rt_sa_setopts(
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void *rt,
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int subadr,
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unsigned int mask,
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unsigned int options
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);
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/* Get The Subaddress and transfer type of a scheduled list. Normally the
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* application knows which subaddress the list is for.
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*
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* \param list List to lookup information for
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* \param subadr Pointer to where the subaddress is stored
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* \param tx Transfer type is stored here. 1=TX, 0=RX.
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*/
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extern void gr1553rt_list_sa(
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struct gr1553rt_list *list,
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int *subadr,
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int *tx
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);
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/* Start RT Communication
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*
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* Interrupts will be enabled. The RT enabled and the "RT-run-time"
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* part of the API will be opened for the user and parts that need the
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* RT to be stopped are no longer available. After the RT has been
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* started the configuration function can not be called.
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*/
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extern int gr1553rt_start(void *rt);
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/* Get Status of the RT core. See data structure gr1553rt_status for more
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* information about the result. It can be used to read out:
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* - time information
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* - sync information
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* - bus & RT status
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*
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* \param status Pointer to where the status words will be stored. They
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* are stored according to the gr1553rt_status data structure.
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*/
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extern void gr1553rt_status(void *rt, struct gr1553rt_status *status);
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/* Stop RT communication. Only possible to stop an already started RT device.
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* Interrupts are disabled and the RT Enable bit cleared.
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*/
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extern void gr1553rt_stop(void *rt);
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/* Set RT vector and/or bit word.
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*
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* - Vector Word is used in response to "Transmit vector word" BC commands
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* - Bit Word is used in response to "Transmit bit word" BC commands
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*
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*
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* \param mask Bit-Mask, bits that are 1 will result in that bit in the
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* words register being overwritten with the value of words
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* \param words Bits 31..16: Bit Word. Bits 15..0: Vector Word.
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*
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* Operation:
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* hw_words = (hw_words & ~mask) | (words & mask)
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*/
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extern void gr1553rt_set_vecword(
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void *rt,
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unsigned int mask,
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unsigned int words
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);
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/* Set selectable bits of the "Bus Status Register". The bits written
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* is determined by the "mask" bit-mask. Operation:
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*
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* bus_status = (bus_status & ~mask) | (sts & mask)
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*
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*/
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extern void gr1553rt_set_bussts(void *rt, unsigned int mask, unsigned int sts);
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/* Read up to MAX number of entries in eventlog log.
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*
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* \param dst Destination address for event log entries
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* \param max Maximal number of event log entries that an be stored into dst
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*
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* Return
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* negative Failure
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* zero No entries available at the moment
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* positive Number of entries copied into dst
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*/
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extern int gr1553rt_evlog_read(void *rt, unsigned int *dst, int max);
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#ifdef __cplusplus
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}
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#endif
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#endif
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