forked from Imagelibrary/rtems
38c72c0fc9
* clock/ckinit.c, mongoosev/duart/mg5uart.c, mongoosev/duart/mg5uart.h, mongoosev/duart/mg5uart_reg.c, mongoosev/include/mongoose-v.h, mongoosev/vectorisrs/maxvectors.c, mongoosev/vectorisrs/vectorisrs.c, r46xx/vectorisrs/maxvectors.c, shared/interrupts/isr_entries.S, timer/timer.c, tx39/vectorisrs/maxvectors.c: URL for license changed.
80 lines
1.5 KiB
ArmAsm
80 lines
1.5 KiB
ArmAsm
/*
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* This file contains the raw entry points for the exceptions.
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*
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* COPYRIGHT (c) 1989-2000.
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* On-Line Applications Research Corporation (OAR).
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.com/license/LICENSE.
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*
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* $Id$
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*/
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#include <asm.h>
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#include "iregdef.h"
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#include "idtcpu.h"
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/*
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* MIPS ISA Level 1 entries
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*/
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#if __mips == 1
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FRAME(exc_norm_code,sp,0,ra)
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la k0, _ISR_Handler /* generic external int hndlr */
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j k0
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nop
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ENDFRAME(exc_norm_code)
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FRAME(exc_dbg_code,sp,0,ra)
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la k0, _DBG_Handler /* debug interrupt */
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j k0
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nop
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ENDFRAME(exc_dbg_code)
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/* XXX this is dependent on IDT/SIM and needs to be addressed */
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FRAME(exc_utlb_code,sp,0,ra)
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la k0, (R_VEC+((48)*8))
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j k0
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nop
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ENDFRAME(exc_utlb_code)
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/*
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* MIPS ISA Level 3
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* XXX Again, reliance on SIM. Not good.
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*/
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#elif __mips == 3
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FRAME(exc_tlb_code,sp,0,ra)
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la k0, (R_VEC+((112)*8)) /* R4000 Sim location */
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j k0
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nop
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ENDFRAME(exc_tlb_code)
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FRAME(exc_xtlb_code,sp,0,ra)
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la k0, (R_VEC+((112)*8)) /* R4000 Sim location */
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j k0
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nop
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ENDFRAME(exc_xtlb_code)
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FRAME(exc_cache_code,sp,0,ra)
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la k0, (R_VEC+((112)*8)) /* R4000 Sim location */
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j k0
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nop
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ENDFRAME(exc_cache_code)
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FRAME(exc_norm_code,sp,0,ra)
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la k0, _ISR_Handler /* generic external int hndlr */
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j k0
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nop
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ENDFRAME(exc_norm_code)
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#else
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#error "isr_entries.S: ISA support problem"
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#endif
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