forked from Imagelibrary/rtems
33f6e34b2d
This patch changes the license to BSD-2 for all source files where the copyright is held by Aeroflex Gaisler, Cobham Gaisler, or Gaisler Research. Some files also includes copyright right statements from OAR and/or embedded Brains in addition to Gaisler. Updates #3053.
85 lines
3.3 KiB
C
85 lines
3.3 KiB
C
/* SPDX-License-Identifier: BSD-2-Clause */
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/* GRLIB GRPCI2 PCI HOST driver.
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*
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* COPYRIGHT (c) 2011
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* Cobham Gaisler AB.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __GRPCI2_H__
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#define __GRPCI2_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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extern void grpci2_register_drv(void);
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/* Driver Resources:
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*
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* PCI Interrupts
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* ==============
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* The interrupt settings are normally autodetected from Plyg&Play, however
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* if IRQs are routed using custom GPIO pins in order to reduce the PIN count
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* reserved for PCI, the options below can be used to tell GRPCI2 driver which
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* System IRQ a PCI interrupt is connected to.
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* Name="INTA#", Type=INT, System Interrupt number that PCI INTA is connected to
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* Name="INTB#", Type=INT, System Interrupt number that PCI INTB is connected to
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* Name="INTC#", Type=INT, System Interrupt number that PCI INTC is connected to
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* Name="INTD#", Type=INT, System Interrupt number that PCI INTD is connected to
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*
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* Name="IRQmask", Type=INT,
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*
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* PCI Bytetwisting (endianess)
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* ============================
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* Name="byteTwisting", Type=INT, Enable/Disable Bytetwisting by hardware
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*
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* PCI Latency timer
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* ============================
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* Name="latencyTimer", Type=INT, Set the latency timer
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*
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* PCI Host's Target BARs setup
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* ============================
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* The Host's BARs are not configured by the configuration routines, by default
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* the BARs are configured disabled (BAR=0) except for BAR0 which is mapped to
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* the Main Memory for the Host.
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* Name="tgtBarCfg", Type=PTR (*grpci2_pcibar_cfg), Target PCI BARs of Host
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*/
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/* When the Host acts as a target on the PCI bus, the PCI BARs of the host's
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* configuration space determine at which PCI address the Host will be accessed
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* at and when accessing a BAR which AMBA address it will be translated to.
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*/
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struct grpci2_pcibar_cfg {
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unsigned int pciadr; /* PCI address of BAR (BAR content) */
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unsigned int ahbadr; /* 'pciadr' translated to this AHB Address */
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unsigned int barsize; /* PCI BAR Size, must be a power of 2 */
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};
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#ifdef __cplusplus
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}
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#endif
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#endif
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