forked from Imagelibrary/rtems
30ca711d19
This adds Xilinx's driver for the Xilinx NAND controller embedded in the ZynqMP SoC. Within that device alone, it is possible to access this peripheral from MicroBlaze, ARMv7, and ARMv8 cores. This has been added to the hardware ZynqMP BSPs since QEMU does not support emulation of this peripheral. This driver supports polled operation only. The imported files are and should be able to remain unmodified. Import information is kept in bsps/shared/dev/nand/VERSION.
92 lines
2.4 KiB
C
92 lines
2.4 KiB
C
/******************************************************************************
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* Copyright (C) 2015 - 2022 Xilinx, Inc. All rights reserved.
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* SPDX-License-Identifier: MIT
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file xnandpsu_onfi.c
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* @addtogroup nandpsu_v1_10
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* @{
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*
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* This file contains the implementation of ONFI specific functions.
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*
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* @note None
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- ---------- -----------------------------------------------
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* 1.0 nm 05/06/2014 First release
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* </pre>
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*
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******************************************************************************/
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/***************************** Include Files *********************************/
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#include "xnandpsu_onfi.h"
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#include "xnandpsu.h"
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/************************** Constant Definitions *****************************/
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/**************************** Type Definitions *******************************/
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/***************** Macros (Inline Functions) Definitions *********************/
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/************************** Function Prototypes ******************************/
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/*****************************************************************************/
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/**
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*
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* This function calculates ONFI parameter page CRC.
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*
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* @param ParamBuf is a pointer to the ONFI parameter page buffer.
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* @param StartOff is the starting offset in buffer to calculate CRC.
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* @param Length is the number of bytes for which CRC is calculated.
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*
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* @return
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* CRC value.
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* @note
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* None.
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*
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******************************************************************************/
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u32 XNandPsu_OnfiParamPageCrc(u8 *ParamBuf, u32 StartOff, u32 Length)
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{
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const u32 CrcInit = 0x4F4EU;
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const u32 Order = 16U;
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const u32 Polynom = 0x8005U;
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u32 i, j, c, Bit;
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u32 Crc = CrcInit;
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u32 DataIn;
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u32 DataByteCount = 0U;
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u32 CrcMask, CrcHighBit;
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CrcMask = ((u32)(((u32)1 << (Order - (u32)1)) -(u32)1) << (u32)1) | (u32)1;
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CrcHighBit = (u32)((u32)1 << (Order - (u32)1));
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/*
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* CRC covers the data bytes between byte 0 and byte 253
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* (ONFI 1.0, section 5.4.1.36)
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*/
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for(i = StartOff; i < Length; i++) {
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DataIn = *(ParamBuf + i);
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c = (u32)DataIn;
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DataByteCount++;
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j = 0x80U;
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while(j != 0U) {
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Bit = Crc & CrcHighBit;
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Crc <<= 1U;
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if ((c & j) != 0U) {
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Bit ^= CrcHighBit;
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}
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if (Bit != 0U) {
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Crc ^= Polynom;
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}
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j >>= 1U;
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}
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Crc &= CrcMask;
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}
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return Crc;
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}
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/** @} */
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