forked from Imagelibrary/rtems
127 lines
4.5 KiB
C
127 lines
4.5 KiB
C
/*
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* SPICTRL SPI Driver interface.
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*
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* COPYRIGHT (c) 2009.
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* Cobham Gaisler AB.
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#ifndef __SPICTRL_H__
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#define __SPICTRL_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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extern void spictrl_register_drv (void);
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/*** REGISTER LAYOUT ***/
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struct spictrl_regs {
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volatile unsigned int capability; /* 0x00 */
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volatile unsigned int resv[7]; /* 0x04 */
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volatile unsigned int mode; /* 0x20 */
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volatile unsigned int event; /* 0x24 */
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volatile unsigned int mask; /* 0x28 */
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volatile unsigned int command; /* 0x2c */
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volatile unsigned int tx; /* 0x30 */
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volatile unsigned int rx; /* 0x34 */
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volatile unsigned int slvsel; /* 0x38 */
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volatile unsigned int am_slvsel; /* 0x3c */
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volatile unsigned int am_cfg; /* 0x40 */
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volatile unsigned int am_period; /* 0x44 */
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int reserved0[2];
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volatile unsigned int am_mask[4]; /* 0x50-0x5C */
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int reserved1[(0x200-0x60)/4];
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volatile unsigned int am_tx[128]; /* 0x200-0x3FC */
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volatile unsigned int am_rx[128]; /* 0x400-0x5FC */
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};
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/* -- About automated periodic transfer mode --
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*
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* Core must support this feature.
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*
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* The SPI core must be configured in periodic mode before
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* writing the data into the transfer FIFO which will be used
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* mutiple times in different transfers, it will also make
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* the receive FIFO to be updated.
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*
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* In periodic mode the following sequence is performed,
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* 1. start()
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* 2. ioctl(CONFIG, &config) - Enable periodic mode
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* 3. set_address()
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* 4. write() - Fills TX FIFO, this has some constraints
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* 5. ioctl(START) - Starts the periodic transmission of the TX FIFO
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* 6. read() - Read one response of the tranistted data. It will
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* hang until data is available. If hanging is not an
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* options use ioctl(STATUS)
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* 7. go back to 6.
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*
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* 8. ioctl(STOP) - Stop to set up a new periodic or normal transfer
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* 9. stop()
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*
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* Note that the the read length must equal the total write length.
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*/
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/* Custom SPICTRL driver ioctl commands */
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#define SPICTRL_IOCTL_PERIOD_START 5000 /* Start automated periodic transfer mode */
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#define SPICTRL_IOCTL_PERIOD_STOP 5001 /* Stop to SPI core from doing periodic transfers */
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#define SPICTRL_IOCTL_CONFIG 5002 /* Configure Periodic transfer mode (before calling write() and START) */
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#define SPICTRL_IOCTL_STATUS 5003 /* Get status */
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#define SPICTRL_IOCTL_PERIOD_READ 5005 /* Write transmit registers and mask register
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* (only in automatic periodic mode)
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* Note that it is probably prefferred to read
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* the received words using the read() using
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* operations instead.
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*/
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#define SPICTRL_IOCTL_PERIOD_WRITE 5006 /* Read receive registers and mask register
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* (only in automatic periodic mode) */
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#define SPICTRL_IOCTL_REGS 5007 /* Get SPICTRL Register */
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/* SPICTRL_IOCTL_CONFIG argument */
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struct spictrl_ioctl_config {
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int clock_gap; /* Clock GAP between */
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unsigned int flags; /* Normal mode flags */
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int periodic_mode; /* 1=Enables Automated periodic transfers if supported by hardware */
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unsigned int period; /* Number of clocks between automated transfers are started */
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unsigned int period_flags; /* Options */
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unsigned int period_slvsel; /* Slave Select when transfer is not active, default is 0xffffffff */
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};
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#define SPICTRL_FLAGS_TAC 0x10
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#define SPICTRL_PERIOD_FLAGS_ERPT 0x80 /* Trigger start-period from external signal */
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#define SPICTRL_PERIOD_FLAGS_SEQ 0x40
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#define SPICTRL_PERIOD_FLAGS_STRICT 0x20
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#define SPICTRL_PERIOD_FLAGS_OVTB 0x10
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#define SPICTRL_PERIOD_FLAGS_OVDB 0x08
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#define SPICTRL_PERIOD_FLAGS_ASEL 0x04
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#define SPICTRL_PERIOD_FLAGS_EACT 0x01
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/* SPICTRL_IOCTL_PERIOD_READ and SPICTRL_IOCTL_PERIOD_WRITE Argument data structure
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*
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* Note that the order of reading the mask registers are different for read/write
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* operation. See options notes.
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*/
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struct spictrl_period_io {
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int options; /* READ: bit0=Read Mask Registers into masks[].
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* bit1=Read Receive registers according to masks[]
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* (after reading masks).
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*
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* WRITE: bit0=Update Mask accoring to masks[].
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* bit1=Update Transmit registers according to masks[].
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* (before reading masks)
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*/
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unsigned int masks[4];
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void *data; /* Data read sequentially according to masks[] bit. */
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};
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#ifdef __cplusplus
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}
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#endif
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#endif
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