forked from Imagelibrary/rtems
66 lines
2.1 KiB
C
66 lines
2.1 KiB
C
/* GRLIB GRPCI2 PCI HOST driver.
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*
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* COPYRIGHT (c) 2011
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* Cobham Gaisler AB.
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*
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* The license and distribution terms for this file may be
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* found in found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#ifndef __GRPCI2_H__
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#define __GRPCI2_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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extern void grpci2_register_drv(void);
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/* Driver Resources:
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*
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* PCI Interrupts
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* ==============
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* The interrupt settings are normally autodetected from Plyg&Play, however
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* if IRQs are routed using custom GPIO pins in order to reduce the PIN count
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* reserved for PCI, the options below can be used to tell GRPCI2 driver which
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* System IRQ a PCI interrupt is connected to.
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* Name="INTA#", Type=INT, System Interrupt number that PCI INTA is connected to
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* Name="INTB#", Type=INT, System Interrupt number that PCI INTB is connected to
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* Name="INTC#", Type=INT, System Interrupt number that PCI INTC is connected to
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* Name="INTD#", Type=INT, System Interrupt number that PCI INTD is connected to
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*
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* Name="IRQmask", Type=INT,
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*
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* PCI Bytetwisting (endianess)
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* ============================
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* Name="byteTwisting", Type=INT, Enable/Disable Bytetwisting by hardware
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*
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* PCI Latency timer
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* ============================
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* Name="latencyTimer", Type=INT, Set the latency timer
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*
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* PCI Host's Target BARs setup
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* ============================
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* The Host's BARs are not configured by the configuration routines, by default
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* the BARs are configured disabled (BAR=0) except for BAR0 which is mapped to
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* the Main Memory for the Host.
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* Name="tgtBarCfg", Type=PTR (*grpci2_pcibar_cfg), Target PCI BARs of Host
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*/
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/* When the Host acts as a target on the PCI bus, the PCI BARs of the host's
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* configuration space determine at which PCI address the Host will be accessed
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* at and when accessing a BAR which AMBA address it will be translated to.
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*/
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struct grpci2_pcibar_cfg {
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unsigned int pciadr; /* PCI address of BAR (BAR content) */
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unsigned int ahbadr; /* 'pciadr' translated to this AHB Address */
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unsigned int barsize; /* PCI BAR Size, must be a power of 2 */
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};
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#ifdef __cplusplus
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}
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#endif
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#endif
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