forked from Imagelibrary/rtems
9964895866
Adjust build support files to new directory layout. This patch is a part of the BSP source reorganization. Update #3285.
77 lines
1.6 KiB
C
77 lines
1.6 KiB
C
/*
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* Copyright (c) 2012 Sebastian Huber. All rights reserved.
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*
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* embedded brains GmbH
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* Obere Lagerstr. 30
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* 82178 Puchheim
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* Germany
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* <rtems@embedded-brains.de>
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#include <bsp/rcc.h>
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#include <bsp/stm32f4.h>
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#include <rtems.h>
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static void rcc_set(
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stm32f4_rcc_index index,
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bool set,
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volatile uint32_t *regs
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)
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{
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int reg = index >> 5;
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uint32_t one = 1;
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uint32_t bit = one << (index & 0x1f);
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rtems_interrupt_level level;
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uint32_t val;
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rtems_interrupt_disable(level);
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val = regs [reg];
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if (set) {
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val |= bit;
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} else {
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val &= ~bit;
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}
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regs [reg] = val;
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rtems_interrupt_enable(level);
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}
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void stm32f4_rcc_reset(stm32f4_rcc_index index)
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{
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stm32f4_rcc_set_reset(index, true);
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stm32f4_rcc_set_reset(index, false);
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}
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void stm32f4_rcc_set_reset(stm32f4_rcc_index index, bool set)
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{
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volatile stm32f4_rcc *rcc = STM32F4_RCC;
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#ifdef STM32F4_FAMILY_F4XXXX
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rcc_set(index, set, &rcc->ahbrstr [0]);
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#endif/* STM32F4_FAMILY_F4XXXX */
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#ifdef STM32F4_FAMILY_F10XXX
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/* The first register is missing for the reset-block */
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rcc_set(index, set, &rcc->cir);
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#endif /* STM32F4_FAMILY_F10XXX */
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}
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void stm32f4_rcc_set_clock(stm32f4_rcc_index index, bool set)
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{
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volatile stm32f4_rcc *rcc = STM32F4_RCC;
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rcc_set(index, set, &rcc->ahbenr [0]);
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}
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#ifdef STM32F4_FAMILY_F4XXXX
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void stm32f4_rcc_set_low_power_clock(stm32f4_rcc_index index, bool set)
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{
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volatile stm32f4_rcc *rcc = STM32F4_RCC;
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rcc_set(index, set, &rcc->ahblpenr [0]);
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}
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#endif /* STM32F4_FAMILY_F4XXXX */
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