forked from Imagelibrary/rtems
77 lines
2.0 KiB
Perl
77 lines
2.0 KiB
Perl
@c
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@c COPYRIGHT (c) 2014 Hesham ALMatary <heshamelmatary@gmail.com>
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@c All rights reserved.
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@ifinfo
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@end ifinfo
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@chapter OpenRISC 1000 Specific Information
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This chapter discusses the
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@uref{http://opencores.org/or1k/Main_Page, OpenRISC 1000 architecture}
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dependencies in this port of RTEMS. There are many implementations
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for OpenRISC like or1200 and mor1kx. Currently RTEMS supports basic
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features that all implementations should have.
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@subheading Architecture Documents
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For information on the OpenRISC 1000 architecture refer to the
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@uref{http://openrisc.github.io/or1k.html,OpenRISC 1000 architecture manual}.
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@section Calling Conventions
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Please refer to the
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@uref{http://openrisc.github.io/or1k.html#__RefHeading__504887_595890882,Function Calling Sequence}.
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@subsection Floating Point Unit
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A floating point unit is currently not supported.
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@section Memory Model
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A flat 32-bit memory model is supported.
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@section Interrupt Processing
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OpenRISC 1000 architecture has 13 exception types:
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@itemize @bullet
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@item Reset
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@item Bus Error
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@item Data Page Fault
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@item Instruction Page Fault
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@item Tick Timer
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@item Alignment
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@item Illegal Instruction
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@item External Interrupt
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@item D-TLB Miss
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@item I-TLB Miss
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@item Range
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@item System Call
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@item Floating Point
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@item Trap
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@end itemize
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@subsection Interrupt Levels
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There are only two levels: interrupts enabled and interrupts disabled.
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@subsection Interrupt Stack
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The OpenRISC RTEMS port uses a dedicated software interrupt stack.
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The stack for interrupts is allocated during interrupt driver initialization.
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When an interrupt is entered, the _ISR_Handler routine is responsible for
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switching from the interrupted task stack to RTEMS software interrupt stack.
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@section Default Fatal Error Processing
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The default fatal error handler for this architecture performs the
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following actions:
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@itemize @bullet
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@item disables operating system supported interrupts (IRQ),
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@item places the error code in @code{r0}, and
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@item executes an infinite loop to simulate a halt processor instruction.
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@end itemize
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