forked from Imagelibrary/rtems
122 lines
3.7 KiB
C
122 lines
3.7 KiB
C
/* SPDX-License-Identifier: BSD-2-Clause */
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/**
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* @file
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* @ingroup RTEMSBSPsLM32Shared lm32_uart
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* @brief LatticeMico32 UART definitions
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*/
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/*
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* This file contains definitions for LatticeMico32 UART
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*
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* COPYRIGHT (c) 1989-1999.
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* On-Line Applications Research Corporation (OAR).
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* Jukka Pietarinen <jukka.pietarinen@mrf.fi>, 2008,
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* Micro-Research Finland Oy
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*/
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/**
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* @defgroup lm32_uart LM32 UART
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* @ingroup RTEMSBSPsLM32Shared
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* @brief LatticeMico32 UART definitions
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* @{
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*/
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#ifndef _BSPUART_H
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#define _BSPUART_H
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void BSP_uart_init(int baud);
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/* Receive buffer register / transmit holding register */
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#define LM32_UART_RBR (0x0000)
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/* Interrupt enable register */
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#define LM32_UART_IER (0x0004)
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#define LM32_UART_IER_RBRI (0x0001)
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#define LM32_UART_IER_THRI (0x0002)
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#define LM32_UART_IER_RLSI (0x0004)
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#define LM32_UART_IER_MSI (0x0008)
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/* Interrupt identification register */
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#define LM32_UART_IIR (0x0008)
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#define LM32_UART_IIR_STAT (0x0001)
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#define LM32_UART_IIR_ID0 (0x0002)
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#define LM32_UART_IIR_ID1 (0x0004)
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/* Line control register */
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#define LM32_UART_LCR (0x000C)
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#define LM32_UART_LCR_WLS0 (0x0001)
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#define LM32_UART_LCR_WLS1 (0x0002)
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#define LM32_UART_LCR_STB (0x0004)
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#define LM32_UART_LCR_PEN (0x0008)
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#define LM32_UART_LCR_EPS (0x0010)
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#define LM32_UART_LCR_SP (0x0020)
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#define LM32_UART_LCR_SB (0x0040)
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#define LM32_UART_LCR_5BIT (0)
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#define LM32_UART_LCR_6BIT (LM32_UART_LCR_WLS0)
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#define LM32_UART_LCR_7BIT (LM32_UART_LCR_WLS1)
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#define LM32_UART_LCR_8BIT (LM32_UART_LCR_WLS1 | LM32_UART_LCR_WLS0)
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/* Modem control register */
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#define LM32_UART_MCR (0x0010)
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#define LM32_UART_MCR_DTR (0x0001)
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#define LM32_UART_MCR_RTS (0x0002)
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/* Line status register */
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#define LM32_UART_LSR (0x0014)
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#define LM32_UART_LSR_DR (0x0001)
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#define LM32_UART_LSR_OE (0x0002)
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#define LM32_UART_LSR_PE (0x0004)
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#define LM32_UART_LSR_FE (0x0008)
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#define LM32_UART_LSR_BI (0x0010)
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#define LM32_UART_LSR_THRE (0x0020)
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#define LM32_UART_LSR_TEMT (0x0040)
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/* Modem status register */
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#define LM32_UART_MSR (0x0018)
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#define LM32_UART_MSR_DCTS (0x0001)
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#define LM32_UART_MSR_DDSR (0x0002)
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#define LM32_UART_MSR_TERI (0x0004)
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#define LM32_UART_MSR_DDCD (0x0008)
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#define LM32_UART_MSR_CTS (0x0010)
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#define LM32_UART_MSR_DSR (0x0020)
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#define LM32_UART_MSR_RI (0x0040)
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#define LM32_UART_MSR_DCD (0x0000)
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/* Baud-rate divisor register */
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#define LM32_UART_DIV (0x001C)
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#endif /* _BSPUART_H */
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/** @} */
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