forked from Imagelibrary/rtems
The base addresses and IRQ numbers for UART 0 and 1 were interchanged. Fix this and set BSP_CONSOLE_MINOR to 0 for this BSP family.
286 lines
8.4 KiB
C
286 lines
8.4 KiB
C
/* SPDX-License-Identifier: BSD-2-Clause */
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/**
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* @file
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*
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* @ingroup RTEMSBSPsAArch64XilinxZynqMP
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*
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* @brief This source file contains this BSP's console configuration.
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*/
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/*
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* Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
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* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <rtems/console.h>
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#include <rtems/bspIo.h>
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#include <rtems/endian.h>
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#include <rtems/sysinit.h>
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#include <rtems/termiostypes.h>
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#include <bsp/aarch64-mmu.h>
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#include <bsp/fdt.h>
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#include <bsp/irq.h>
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#include <dev/serial/zynq-uart.h>
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#include <bspopts.h>
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#include <libfdt.h>
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#include <libchip/ns16550.h>
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uint32_t mgmt_uart_reg_shift = 0;
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static uint8_t get_register(uintptr_t addr, uint8_t i)
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{
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volatile uint8_t *reg = (uint8_t *) addr;
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i <<= mgmt_uart_reg_shift;
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return reg [i];
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}
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static void set_register(uintptr_t addr, uint8_t i, uint8_t val)
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{
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volatile uint8_t *reg = (uint8_t *) addr;
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i <<= mgmt_uart_reg_shift;
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reg [i] = val;
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}
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static ns16550_context zynqmp_mgmt_uart_context = {
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.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("Management UART 0"),
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.get_reg = get_register,
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.set_reg = set_register,
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.port = 0,
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.irq = 0,
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.clock = 0,
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.initial_baud = 0,
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};
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__attribute__ ((weak)) void zynqmp_configure_management_console(rtems_termios_device_context *base)
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{
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/* This SLIP-encoded watchdog command sets timeouts to 0xFFFFFFFF seconds. */
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const char mgmt_watchdog_cmd[] =
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"\xc0\xda\x00\x00\xff\xff\xff\xff\xff\x00\xff\xff\xff\xffM#\xc0";
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/* Send the system watchdog configuration command */
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for (int i = 0; i < sizeof(mgmt_watchdog_cmd); i++) {
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ns16550_polled_putchar(base, mgmt_watchdog_cmd[i]);
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}
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}
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static void zynqmp_management_console_init(void)
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{
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/* Find the management console in the device tree */
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const void *fdt = bsp_fdt_get();
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const uint32_t *prop;
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uint32_t outprop[4];
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int proplen;
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int node;
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const char *alias = fdt_get_alias(fdt, "mgmtport");
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if (alias == NULL) {
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return;
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}
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node = fdt_path_offset(fdt, alias);
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prop = fdt_getprop(fdt, node, "clock-frequency", &proplen);
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if ( prop == NULL || proplen != 4 ) {
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zynqmp_mgmt_uart_context.port = 0;
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return;
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}
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outprop[0] = rtems_uint32_from_big_endian((const uint8_t *) &prop[0]);
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zynqmp_mgmt_uart_context.clock = outprop[0];
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prop = fdt_getprop(fdt, node, "current-speed", &proplen);
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if ( prop == NULL || proplen != 4 ) {
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zynqmp_mgmt_uart_context.port = 0;
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return;
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}
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outprop[0] = rtems_uint32_from_big_endian((const uint8_t *) &prop[0]);
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zynqmp_mgmt_uart_context.initial_baud = outprop[0];
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prop = fdt_getprop(fdt, node, "interrupts", &proplen);
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if ( prop == NULL || proplen != 12 ) {
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zynqmp_mgmt_uart_context.port = 0;
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return;
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}
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outprop[0] = rtems_uint32_from_big_endian((const uint8_t *) &prop[0]);
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outprop[1] = rtems_uint32_from_big_endian((const uint8_t *) &prop[1]);
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outprop[2] = rtems_uint32_from_big_endian((const uint8_t *) &prop[2]);
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/* proplen is in bytes, interrupt mapping expects a length in 32-bit cells */
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zynqmp_mgmt_uart_context.irq = bsp_fdt_map_intr(outprop, proplen / 4);
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if ( zynqmp_mgmt_uart_context.irq == 0 ) {
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zynqmp_mgmt_uart_context.port = 0;
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return;
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}
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prop = fdt_getprop(fdt, node, "reg", &proplen);
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if ( prop == NULL || proplen != 16 ) {
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zynqmp_mgmt_uart_context.port = 0;
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return;
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}
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outprop[0] = rtems_uint32_from_big_endian((const uint8_t *) &prop[0]);
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outprop[1] = rtems_uint32_from_big_endian((const uint8_t *) &prop[1]);
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outprop[2] = rtems_uint32_from_big_endian((const uint8_t *) &prop[2]);
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outprop[3] = rtems_uint32_from_big_endian((const uint8_t *) &prop[3]);
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zynqmp_mgmt_uart_context.port = ( ( (uint64_t) outprop[0] ) << 32 ) | outprop[1];
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uintptr_t uart_base = zynqmp_mgmt_uart_context.port;
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size_t uart_size = ( ( (uint64_t) outprop[2] ) << 32 ) | outprop[3];
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rtems_status_code sc = aarch64_mmu_map( uart_base,
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uart_size,
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AARCH64_MMU_DEVICE);
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if ( sc != RTEMS_SUCCESSFUL ) {
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zynqmp_mgmt_uart_context.port = 0;
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return;
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}
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prop = fdt_getprop(fdt, node, "reg-offset", &proplen);
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if ( prop == NULL || proplen != 4 ) {
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zynqmp_mgmt_uart_context.port = 0;
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return;
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}
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outprop[0] = rtems_uint32_from_big_endian((const uint8_t *) &prop[0]);
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zynqmp_mgmt_uart_context.port += outprop[0];
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prop = fdt_getprop(fdt, node, "reg-shift", &proplen);
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if ( prop == NULL || proplen != 4 ) {
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zynqmp_mgmt_uart_context.port = 0;
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return;
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}
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outprop[0] = rtems_uint32_from_big_endian((const uint8_t *) &prop[0]);
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mgmt_uart_reg_shift = outprop[0];
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ns16550_probe(&zynqmp_mgmt_uart_context.base);
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zynqmp_configure_management_console(&zynqmp_mgmt_uart_context.base);
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}
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RTEMS_SYSINIT_ITEM(
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zynqmp_management_console_init,
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RTEMS_SYSINIT_BSP_START,
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RTEMS_SYSINIT_ORDER_FIRST
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);
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static zynq_uart_context zynqmp_uart_instances[2] = {
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{
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.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 0" ),
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.regs = (volatile struct zynq_uart *) 0xff000000,
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.irq = ZYNQMP_IRQ_UART_0
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}, {
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.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 1" ),
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.regs = (volatile struct zynq_uart *) 0xff010000,
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.irq = ZYNQMP_IRQ_UART_1
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}
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};
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rtems_status_code console_initialize(
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rtems_device_major_number major,
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rtems_device_minor_number minor,
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void *arg
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)
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{
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size_t i;
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rtems_termios_initialize();
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for (i = 0; i < RTEMS_ARRAY_SIZE(zynqmp_uart_instances); ++i) {
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char uart[] = "/dev/ttySX";
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uart[sizeof(uart) - 2] = (char) ('0' + i);
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rtems_termios_device_install(
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&uart[0],
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&zynq_uart_handler,
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NULL,
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&zynqmp_uart_instances[i].base
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);
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if (i == BSP_CONSOLE_MINOR) {
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link(&uart[0], CONSOLE_DEVICE_NAME);
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}
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}
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if ( zynqmp_mgmt_uart_context.port != 0 ) {
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rtems_termios_device_install(
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"/dev/ttyMGMT0",
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&ns16550_handler_interrupt,
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NULL,
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&zynqmp_mgmt_uart_context.base
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);
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}
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return RTEMS_SUCCESSFUL;
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}
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void zynqmp_debug_console_flush(void)
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{
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zynq_uart_reset_tx_flush(&zynqmp_uart_instances[BSP_CONSOLE_MINOR]);
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}
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static void zynqmp_debug_console_out(char c)
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{
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rtems_termios_device_context *base =
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&zynqmp_uart_instances[BSP_CONSOLE_MINOR].base;
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zynq_uart_write_polled(base, c);
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}
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static void zynqmp_debug_console_init(void)
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{
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rtems_termios_device_context *base =
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&zynqmp_uart_instances[BSP_CONSOLE_MINOR].base;
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zynq_uart_initialize(base);
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BSP_output_char = zynqmp_debug_console_out;
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}
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static void zynqmp_debug_console_early_init(char c)
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{
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rtems_termios_device_context *base =
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&zynqmp_uart_instances[BSP_CONSOLE_MINOR].base;
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zynq_uart_initialize(base);
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BSP_output_char = zynqmp_debug_console_out;
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zynqmp_debug_console_out(c);
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}
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static int zynqmp_debug_console_in(void)
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{
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rtems_termios_device_context *base =
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&zynqmp_uart_instances[BSP_CONSOLE_MINOR].base;
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return zynq_uart_read_polled(base);
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}
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BSP_output_char_function_type BSP_output_char = zynqmp_debug_console_early_init;
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BSP_polling_getchar_function_type BSP_poll_char = zynqmp_debug_console_in;
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RTEMS_SYSINIT_ITEM(
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zynqmp_debug_console_init,
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RTEMS_SYSINIT_BSP_START,
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RTEMS_SYSINIT_ORDER_LAST_BUT_5
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);
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