Files
rtems/cpukit/score/cpu/riscv/riscv-context-initialize.c
Hesham Almatary 11ff3a9e72 cpukit: RISC-V - make riscv32 code work for riscv64 - v2
* Use #ifdefs for 32/64 bit code
* Use unsigned long which is 32-bit on riscv32 and 64-bit on riscv64 (register size)
* Move the code to a new shared riscv folder to be shared between riscv32 and riscv64
* Rename RTEMS_CPU extracted from command line to shared riscv target s/riscv*/riscv

Update #3109
2017-11-01 10:10:27 +11:00

68 lines
2.3 KiB
C

/*
*
* Copyright (c) 2015 University of York.
* Hesham Almatary <hesham@alumni.york.ac.uk>
*
* COPYRIGHT (c) 1989-2006.
* On-Line Applications Research Corporation (OAR).
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include <string.h>
#include <rtems/score/cpu.h>
#include <rtems/score/riscv-utility.h>
#include <rtems/score/interr.h>
void _CPU_Context_Initialize(
Context_Control *context,
void *stack_area_begin,
size_t stack_area_size,
unsigned long new_level,
void (*entry_point)( void ),
bool is_fp,
void *tls_area
)
{
uintptr_t stack = ((uintptr_t) stack_area_begin);
/* Account for red-zone */
uintptr_t stack_high = stack + stack_area_size - RISCV_GCC_RED_ZONE_SIZE;
memset(context, 0, sizeof(*context));
/* Stack Pointer - sp/x2 */
context->x[2] = stack_high;
/* Frame Pointer - fp/x8 */
context->x[8] = stack_high;
/* Return Address - ra/x1 */
context->x[1] = (uintptr_t) entry_point;
/* Enable interrupts and FP */
context->mstatus = MSTATUS_FS | MSTATUS_MIE;
}