forked from Imagelibrary/rtems
107 lines
2.9 KiB
C
107 lines
2.9 KiB
C
/**
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* @file
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*
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* @ingroup lpc32xx_emc
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*
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* @brief EMC support implementation.
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*/
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/*
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* Copyright (c) 2010 embedded brains GmbH. All rights reserved.
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#include <bsp/emc.h>
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#include <bsp.h>
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#include <bsp/mmu.h>
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static volatile lpc_emc *const emc = &lpc32xx.emc;
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static volatile lpc32xx_emc_ahb *const emc_ahb = &lpc32xx.emc_ahb [0];
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static void dynamic_init(const lpc32xx_emc_dynamic_config *cfg)
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{
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uint32_t chip_begin = LPC32XX_BASE_EMC_DYCS_0;
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uint32_t dynamiccontrol = (cfg->control | EMC_DYN_CTRL_CE | EMC_DYN_CTRL_CS)
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& ~EMC_DYN_CTRL_I_MASK;
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size_t i = 0;
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LPC32XX_SDRAMCLK_CTRL = cfg->sdramclk_ctrl;
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emc->dynamicreadconfig = cfg->readconfig;
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/* Timings */
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emc->dynamictrp = cfg->trp;
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emc->dynamictras = cfg->tras;
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emc->dynamictsrex = cfg->tsrex;
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emc->dynamictwr = cfg->twr;
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emc->dynamictrc = cfg->trc;
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emc->dynamictrfc = cfg->trfc;
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emc->dynamictxsr = cfg->txsr;
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emc->dynamictrrd = cfg->trrd;
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emc->dynamictmrd = cfg->tmrd;
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emc->dynamictcdlr = cfg->tcdlr;
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for (i = 0; i < EMC_DYN_CHIP_COUNT; ++i) {
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if (cfg->chip [i].size != 0) {
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emc->dynamic [i].config = cfg->chip [i].config;
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emc->dynamic [i].rascas = cfg->chip [i].rascas;
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}
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}
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/* NOP period */
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emc->dynamiccontrol = dynamiccontrol | EMC_DYN_CTRL_I_NOP;
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lpc32xx_micro_seconds_delay(cfg->nop_time_in_us);
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/* Precharge */
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emc->dynamiccontrol = dynamiccontrol | EMC_DYN_CTRL_I_PALL;
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emc->dynamicrefresh = 1;
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/* FIXME: Why a delay, why this value? */
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lpc32xx_micro_seconds_delay(10);
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/* Refresh timing */
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emc->dynamicrefresh = cfg->refresh;
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/* FIXME: Why a delay, why this value? */
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lpc32xx_micro_seconds_delay(16);
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/* Set modes */
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for (i = 0; i < EMC_DYN_CHIP_COUNT; ++i) {
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if (cfg->chip [i].size != 0) {
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lpc32xx_set_translation_table_entries(
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(void *) chip_begin,
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(void *) (chip_begin + cfg->chip [i].size),
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LPC32XX_MMU_READ_WRITE
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);
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emc->dynamiccontrol = dynamiccontrol | EMC_DYN_CTRL_I_MODE;
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*(volatile uint32_t *)(chip_begin + cfg->chip [i].mode);
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emc->dynamiccontrol = dynamiccontrol | EMC_DYN_CTRL_I_MODE;
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*(volatile uint32_t *)(chip_begin + cfg->chip [i].extmode);
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}
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chip_begin += 0x20000000;
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}
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emc->dynamiccontrol = cfg->control;
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}
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void lpc32xx_emc_init(const lpc32xx_emc_dynamic_config *dyn_cfg)
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{
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/* Enable buffers in AHB ports */
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emc_ahb [0].control = EMC_AHB_PORT_BUFF_EN;
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emc_ahb [3].control = EMC_AHB_PORT_BUFF_EN;
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emc_ahb [4].control = EMC_AHB_PORT_BUFF_EN;
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/* Set AHB port timeouts */
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emc_ahb [0].timeout = EMC_AHB_TIMEOUT(32);
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emc_ahb [3].timeout = EMC_AHB_TIMEOUT(32);
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emc_ahb [4].timeout = EMC_AHB_TIMEOUT(32);
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/* Enable EMC */
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emc->control = EMC_CTRL_E,
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emc->config = 0;
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dynamic_init(dyn_cfg);
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}
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