Chris Johns 05015dc188 Xilinx AXI I2C driver IP race condition causes clock glitch. ...

Setting the PIRQ to 0 before reading the data produces a short clock pulse.
Moving the write to after reading the data fixes the issue.

Close #3173

2018-02-01 14:59:55 +11:00

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i2c

Xilinx AXI I2C driver IP race condition causes clock glitch.

2018-02-01 14:59:55 +11:00

serial

bsps: Fix baud settings

2017-04-03 14:07:58 +02:00

spi

posix/mmap: Add support for file handler and MAP_ANON

2017-07-14 16:04:05 -04:00

Makefile.am

Remove make preinstall

2018-01-25 08:45:26 +01:00