forked from Imagelibrary/rtems
641 lines
17 KiB
C
641 lines
17 KiB
C
/*
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* pci.c : this file contains basic PCI Io functions.
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*
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* Copyright (C) 1999 valette@crf.canon.fr
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*
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* This code is heavily inspired by the public specification of STREAM V2
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* that can be found at :
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*
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* <http://www.chorus.com/Documentation/index.html> by following
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* the STREAM API Specification Document link.
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*
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* Till Straumann, <strauman@slac.stanford.edu>, 1/2002
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* - separated bridge detection code out of this file
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*/
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#include <rtems.h>
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#include <bsp.h>
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#include <libcpu/io.h>
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#include <bsp/pci.h>
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#include <rtems/bspIo.h>
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#undef SHOW_PCI_SETTING
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/* allow for overriding these definitions */
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#ifndef PCI_CONFIG_ADDR
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#define PCI_CONFIG_ADDR 0xcf8
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#endif
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#ifndef PCI_CONFIG_DATA
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#define PCI_CONFIG_DATA 0xcfc
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#endif
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/* define a shortcut */
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#define pci BSP_pci_configuration
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#ifndef PCI_CONFIG_ADDR_VAL
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#define PCI_CONFIG_ADDR_VAL(bus, slot, funcion, offset) \
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(0x80<<24|((bus)<<16)|(PCI_DEVFN((slot),(function))<<8)|(((offset)&~3)))
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#endif
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#ifndef PCI_CONFIG_WR_ADDR
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#define PCI_CONFIG_WR_ADDR( addr, val ) out_le32((volatile uint32_t*)(addr), (val))
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#endif
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#define PCI_CONFIG_SET_ADDR(addr, bus, slot,function,offset) \
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PCI_CONFIG_WR_ADDR((addr), PCI_CONFIG_ADDR_VAL((bus), (slot), (function), (offset)))
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extern void detect_host_bridge(void);
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/*
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* Bit encode for PCI_CONFIG_HEADER_TYPE register
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*/
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unsigned char ucMaxPCIBus;
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static int
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indirect_pci_read_config_byte(
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unsigned char bus,
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unsigned char slot,
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unsigned char function,
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unsigned char offset,
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uint8_t *val
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) {
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PCI_CONFIG_SET_ADDR(pci.pci_config_addr, bus, slot, function, offset);
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*val = in_8(pci.pci_config_data + (offset&3));
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return PCIBIOS_SUCCESSFUL;
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}
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static int
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indirect_pci_read_config_word(
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unsigned char bus,
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unsigned char slot,
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unsigned char function,
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unsigned char offset,
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uint16_t *val
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) {
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*val = 0xffff;
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if (offset&1)
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return PCIBIOS_BAD_REGISTER_NUMBER;
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PCI_CONFIG_SET_ADDR(pci.pci_config_addr, bus, slot, function, offset);
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*val = in_le16((volatile uint16_t *)(pci.pci_config_data + (offset&3)));
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return PCIBIOS_SUCCESSFUL;
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}
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static int
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indirect_pci_read_config_dword(
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unsigned char bus,
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unsigned char slot,
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unsigned char function,
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unsigned char offset,
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uint32_t *val
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) {
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*val = 0xffffffff;
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if (offset&3)
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return PCIBIOS_BAD_REGISTER_NUMBER;
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PCI_CONFIG_SET_ADDR(pci.pci_config_addr, bus, slot, function, offset);
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*val = in_le32((volatile uint32_t *)pci.pci_config_data);
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return PCIBIOS_SUCCESSFUL;
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}
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static int
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indirect_pci_write_config_byte(
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unsigned char bus,
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unsigned char slot,
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unsigned char function,
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unsigned char offset,
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uint8_t val
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) {
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PCI_CONFIG_SET_ADDR(pci.pci_config_addr, bus, slot, function, offset);
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out_8(pci.pci_config_data + (offset&3), val);
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return PCIBIOS_SUCCESSFUL;
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}
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static int
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indirect_pci_write_config_word(
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unsigned char bus,
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unsigned char slot,
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unsigned char function,
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unsigned char offset,
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uint16_t val
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) {
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if (offset&1)
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return PCIBIOS_BAD_REGISTER_NUMBER;
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PCI_CONFIG_SET_ADDR(pci.pci_config_addr, bus, slot, function, offset);
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out_le16((volatile uint16_t *)(pci.pci_config_data + (offset&3)), val);
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return PCIBIOS_SUCCESSFUL;
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}
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static int
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indirect_pci_write_config_dword(
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unsigned char bus,
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unsigned char slot,
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unsigned char function,
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unsigned char offset,
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uint32_t val
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) {
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if (offset&3)
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return PCIBIOS_BAD_REGISTER_NUMBER;
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PCI_CONFIG_SET_ADDR(pci.pci_config_addr, bus, slot, function, offset);
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out_le32((volatile uint32_t *)pci.pci_config_data, val);
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return PCIBIOS_SUCCESSFUL;
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}
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const pci_config_access_functions pci_indirect_functions = {
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indirect_pci_read_config_byte,
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indirect_pci_read_config_word,
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indirect_pci_read_config_dword,
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indirect_pci_write_config_byte,
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indirect_pci_write_config_word,
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indirect_pci_write_config_dword
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};
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rtems_pci_config_t BSP_pci_configuration = {
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(volatile unsigned char*)PCI_CONFIG_ADDR,
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(volatile unsigned char*)PCI_CONFIG_DATA,
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&pci_indirect_functions
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};
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static int
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direct_pci_read_config_byte(
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unsigned char bus,
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unsigned char slot,
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unsigned char function,
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unsigned char offset,
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uint8_t *val
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) {
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if (bus != 0 || (1<<slot & 0xff8007fe)) {
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*val=0xff;
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return PCIBIOS_DEVICE_NOT_FOUND;
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}
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*val=in_8(pci.pci_config_data + ((1<<slot)&~1)
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+ (function<<8) + offset);
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return PCIBIOS_SUCCESSFUL;
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}
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static int
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direct_pci_read_config_word(
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unsigned char bus,
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unsigned char slot,
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unsigned char function,
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unsigned char offset,
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uint16_t *val
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) {
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*val = 0xffff;
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if (offset&1)
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return PCIBIOS_BAD_REGISTER_NUMBER;
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if (bus != 0 || (1<<slot & 0xff8007fe))
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return PCIBIOS_DEVICE_NOT_FOUND;
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*val=in_le16((volatile uint16_t *)
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(pci.pci_config_data + ((1<<slot)&~1)
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+ (function<<8) + offset));
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return PCIBIOS_SUCCESSFUL;
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}
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static int
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direct_pci_read_config_dword(
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unsigned char bus,
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unsigned char slot,
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unsigned char function,
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unsigned char offset,
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uint32_t *val
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) {
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*val = 0xffffffff;
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if (offset&3)
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return PCIBIOS_BAD_REGISTER_NUMBER;
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if (bus != 0 || (1<<slot & 0xff8007fe))
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return PCIBIOS_DEVICE_NOT_FOUND;
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*val=in_le32((volatile uint32_t *)
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(pci.pci_config_data + ((1<<slot)&~1)
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+ (function<<8) + offset));
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return PCIBIOS_SUCCESSFUL;
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}
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static int
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direct_pci_write_config_byte(
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unsigned char bus,
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unsigned char slot,
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unsigned char function,
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unsigned char offset,
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uint8_t val
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) {
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if (bus != 0 || (1<<slot & 0xff8007fe))
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return PCIBIOS_DEVICE_NOT_FOUND;
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out_8(pci.pci_config_data + ((1<<slot)&~1)
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+ (function<<8) + offset,
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val);
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return PCIBIOS_SUCCESSFUL;
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}
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static int
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direct_pci_write_config_word(
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unsigned char bus,
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unsigned char slot,
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unsigned char function,
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unsigned char offset,
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uint16_t val
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) {
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if (offset&1)
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return PCIBIOS_BAD_REGISTER_NUMBER;
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if (bus != 0 || (1<<slot & 0xff8007fe))
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return PCIBIOS_DEVICE_NOT_FOUND;
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out_le16((volatile uint16_t *)
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(pci.pci_config_data + ((1<<slot)&~1)
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+ (function<<8) + offset),
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val);
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return PCIBIOS_SUCCESSFUL;
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}
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static int
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direct_pci_write_config_dword(
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unsigned char bus,
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unsigned char slot,
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unsigned char function,
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unsigned char offset,
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uint32_t val
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) {
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if (offset&3)
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return PCIBIOS_BAD_REGISTER_NUMBER;
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if (bus != 0 || (1<<slot & 0xff8007fe))
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return PCIBIOS_DEVICE_NOT_FOUND;
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out_le32((volatile uint32_t *)
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(pci.pci_config_data + ((1<<slot)&~1)
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+ (function<<8) + offset),
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val);
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return PCIBIOS_SUCCESSFUL;
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}
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const pci_config_access_functions pci_direct_functions = {
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direct_pci_read_config_byte,
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direct_pci_read_config_word,
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direct_pci_read_config_dword,
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direct_pci_write_config_byte,
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direct_pci_write_config_word,
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direct_pci_write_config_dword
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};
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#define PRINT_MSG() \
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printk("pci : Device %d:0x%02x:%d routed to interrupt_line %d\n", \
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pbus, pslot, pfun, int_name )
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/*
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** Validate a test interrupt name and print a warning if its not one of
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** the names defined in the routing record.
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*/
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static int test_intname(
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const struct _int_map *row,
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int pbus,
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int pslot,
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int pfun,
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int int_pin,
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int int_name
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) {
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int j, k;
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int _nopin= -1, _noname= -1;
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for (j=0; row->pin_route[j].pin > -1; j++) {
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if ( row->pin_route[j].pin == int_pin ) {
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_nopin = 0;
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for (k=0; k<4 && row->pin_route[j].int_name[k] > -1; k++ ) {
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if ( row->pin_route[j].int_name[k] == int_name ) {
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_noname=0; break;
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}
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}
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break;
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}
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}
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if( _nopin )
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{
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printk("pci : Device %d:0x%02x:%d supplied a bogus interrupt_pin %d\n", pbus, pslot, pfun, int_pin );
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return -1;
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}
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else
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{
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if( _noname ) {
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unsigned char v = row->pin_route[j].int_name[0];
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printk("pci : Device %d:0x%02x:%d supplied a suspicious interrupt_line %d, ", pbus, pslot, pfun, int_name );
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if ( (row->opts & PCI_FIXUP_OPT_OVERRIDE_NAME) && 255 != (v = row->pin_route[j].int_name[0]) ) {
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printk("OVERRIDING with %d from fixup table\n", v);
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pci_write_config_byte(pbus,pslot,pfun,PCI_INTERRUPT_LINE,v);
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} else {
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printk("using it anyway\n");
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}
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}
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}
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return 0;
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}
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struct pcibridge
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{
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int bus;
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int slot;
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};
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static int FindPCIbridge( int mybus, struct pcibridge *pb )
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{
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int pbus, pslot;
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uint8_t bussec, buspri;
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uint16_t devid, vendorid, dclass;
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for(pbus=0; pbus< pci_bus_count(); pbus++) {
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for(pslot=0; pslot< PCI_MAX_DEVICES; pslot++) {
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pci_read_config_word(pbus, pslot, 0, PCI_DEVICE_ID, &devid);
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if ( devid == 0xffff ) continue;
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pci_read_config_word(pbus, pslot, 0, PCI_DEVICE_ID, &vendorid);
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if ( vendorid == 0xffff ) continue;
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pci_read_config_word(pbus, pslot, 0, PCI_CLASS_DEVICE, &dclass);
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if ( dclass == PCI_CLASS_BRIDGE_PCI ) {
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pci_read_config_byte(pbus, pslot, 0, PCI_PRIMARY_BUS, &buspri);
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pci_read_config_byte(pbus, pslot, 0, PCI_SECONDARY_BUS, &bussec);
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#ifdef SHOW_PCI_SETTING
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printk("pci : Found bridge at %d:0x%02x, mybus %d, pribus %d, secbus %d ",
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pbus, pslot, mybus, buspri, bussec );
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#endif
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if ( bussec == mybus ) {
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#ifdef SHOW_PCI_SETTING
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printk("match\n");
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#endif
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/* found our nearest bridge going towards the root */
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pb->bus = pbus;
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pb->slot = pslot;
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return 0;
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}
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#ifdef SHOW_PCI_SETTING
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printk("no match\n");
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#endif
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}
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}
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}
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return -1;
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}
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void FixupPCI( const struct _int_map *bspmap, int (*swizzler)(int,int) )
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{
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unsigned char cvalue;
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uint16_t devid;
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int ismatch, i, j, pbus, pslot, pfun, int_pin, int_name, nfuns;
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/*
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* If the device has a non-zero INTERRUPT_PIN, assign a bsp-specific
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* INTERRUPT_NAME if one isn't already in place. Then, drivers can
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* trivially use INTERRUPT_NAME to hook up with devices.
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*/
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for (pbus=0; pbus< pci_bus_count(); pbus++) {
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for (pslot=0; pslot< PCI_MAX_DEVICES; pslot++) {
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pci_read_config_word(pbus, pslot, 0, PCI_DEVICE_ID, &devid);
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if ( devid == 0xffff ) continue;
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/* got a device */
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pci_read_config_byte(pbus, pslot, 0, PCI_HEADER_TYPE, &cvalue);
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nfuns = cvalue & PCI_HEADER_TYPE_MULTI_FUNCTION ? PCI_MAX_FUNCTIONS : 1;
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for (pfun=0; pfun< nfuns; pfun++) {
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pci_read_config_word(pbus, pslot, pfun, PCI_DEVICE_ID, &devid);
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if( devid == 0xffff ) continue;
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pci_read_config_byte( pbus, pslot, pfun, PCI_INTERRUPT_PIN, &cvalue);
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int_pin = cvalue;
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pci_read_config_byte( pbus, pslot, pfun, PCI_INTERRUPT_LINE, &cvalue);
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int_name = cvalue;
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/* printk("pci : device %d:0x%02x:%i devid %04x, intpin %d, intline %d\n",
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pbus, pslot, pfun, devid, int_pin, int_name ); */
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#ifdef SHOW_PCI_SETTING
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{
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unsigned short cmd,stat;
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unsigned char lat, seclat, csize;
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pci_read_config_word(pbus,pslot,pfun,PCI_COMMAND, &cmd );
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pci_read_config_word(pbus,pslot,pfun,PCI_STATUS, &stat );
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pci_read_config_byte(pbus,pslot,pfun,PCI_LATENCY_TIMER, &lat );
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pci_read_config_byte(pbus,pslot,pfun,PCI_SEC_LATENCY_TIMER, &seclat );
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pci_read_config_byte(pbus,pslot,pfun,PCI_CACHE_LINE_SIZE, &csize );
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printk("pci : device %d:0x%02x:%d cmd %04X, stat %04X, latency %d, "
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" sec_latency %d, clsize %d\n", pbus, pslot, pfun, cmd, stat,
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lat, seclat, csize);
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}
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#endif
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if ( int_pin > 0 ) {
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ismatch = 0;
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/*
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* first run thru the bspmap table and see if we have an
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* explicit configuration
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*/
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for (i=0; bspmap[i].bus > -1; i++) {
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if ( bspmap[i].bus == pbus && bspmap[i].slot == pslot ) {
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ismatch = -1;
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/* we have a record in the table that gives specific
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* pins and interrupts for devices in this slot */
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if ( int_name == 255 ) {
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/* find the vector associated with whatever pin the
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* device gives us
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*/
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for ( int_name=-1, j=0; bspmap[i].pin_route[j].pin > -1; j++ ) {
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if ( bspmap[i].pin_route[j].pin == int_pin ) {
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int_name = bspmap[i].pin_route[j].int_name[0];
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break;
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}
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}
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if ( int_name == -1 ) {
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printk("pci : Unable to resolve device %d:0x%02x:%d w/ swizzled int "
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"pin %i to an interrupt_line.\n", pbus, pslot, pfun, int_pin );
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} else {
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PRINT_MSG();
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pci_write_config_byte( pbus,pslot,pfun,
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PCI_INTERRUPT_LINE,(cvalue= int_name, cvalue));
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}
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} else {
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test_intname( &bspmap[i],pbus,pslot,pfun,int_pin,int_name);
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}
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break;
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}
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}
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if ( !ismatch ) {
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/*
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* no match, which means we're on a bus someplace. Work
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* backwards from it to one of our defined busses,
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* swizzling thru each bridge on the way.
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*/
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/* keep pbus, pslot pointed to the device being
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* configured while we track down the bridges using
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* tbus,tslot. We keep searching the routing table because
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* we may end up finding our bridge in it
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*/
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int tbus= pbus, tslot= pslot;
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for (;;) {
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for (i=0; bspmap[i].bus > -1; i++) {
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if ( bspmap[i].bus == tbus &&
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(bspmap[i].slot == tslot || bspmap[i].slot == -1) ) {
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ismatch = -1;
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/* found a record for this bus, so swizzle the
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* int_pin which we then use to find the
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* interrupt_name.
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*/
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if ( int_name == 255 ) {
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/*
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|
* FIXME. I can't believe this little hack
|
|
* is right. It does not yield an error in
|
|
* convienently simple situations.
|
|
*/
|
|
if ( tbus ) int_pin = (*swizzler)(tslot,int_pin);
|
|
|
|
/*
|
|
* int_pin points to the interrupt channel
|
|
* this card ends up delivering interrupts
|
|
* on. Find the int_name servicing it.
|
|
*/
|
|
for (int_name=-1, j=0; bspmap[i].pin_route[j].pin > -1; j++){
|
|
if ( bspmap[i].pin_route[j].pin == int_pin ) {
|
|
int_name = bspmap[i].pin_route[j].int_name[0];
|
|
break;
|
|
}
|
|
}
|
|
|
|
if ( int_name == -1 ) {
|
|
printk("pci : Unable to resolve device %d:0x%02x:%d w/ swizzled "
|
|
"int pin %i to an interrupt_line.\n",
|
|
pbus, pslot, pfun, int_pin );
|
|
} else {
|
|
PRINT_MSG();
|
|
pci_write_config_byte(pbus,pslot,pfun,
|
|
PCI_INTERRUPT_LINE,(cvalue=int_name, cvalue));
|
|
}
|
|
} else {
|
|
test_intname(&bspmap[i],pbus,pslot,pfun,int_pin,int_name);
|
|
}
|
|
goto donesearch;
|
|
}
|
|
}
|
|
|
|
if ( !ismatch ) {
|
|
struct pcibridge pb;
|
|
|
|
/*
|
|
* Haven't found our bus in the int map, so work
|
|
* upwards thru the bridges till we find it.
|
|
*/
|
|
|
|
if ( FindPCIbridge( tbus, &pb )== 0 ) {
|
|
int_pin = (*swizzler)(tslot,int_pin);
|
|
|
|
/* our next bridge up is on pb.bus, pb.slot- now
|
|
* instead of pointing to the device we're
|
|
* trying to configure, we move from bridge to
|
|
* bridge.
|
|
*/
|
|
|
|
tbus = pb.bus;
|
|
tslot = pb.slot;
|
|
} else {
|
|
printk("pci : No bridge from bus %i towards root found\n",
|
|
tbus );
|
|
goto donesearch;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
donesearch:
|
|
|
|
if ( !ismatch && int_pin != 0 && int_name == 255 ) {
|
|
printk("pci : Unable to match device %d:0x%02x:%d with an int "
|
|
"routing table entry\n", pbus, pslot, pfun );
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
/*
|
|
* This routine determines the maximum bus number in the system
|
|
*/
|
|
int pci_initialize(void)
|
|
{
|
|
unsigned char ucSlotNumber, ucFnNumber, ucNumFuncs;
|
|
unsigned char ucHeader;
|
|
unsigned char ucMaxSubordinate;
|
|
uint32_t ulClass;
|
|
uint32_t ulDeviceID;
|
|
|
|
detect_host_bridge();
|
|
|
|
/*
|
|
* Scan PCI bus 0 looking for PCI-PCI bridges
|
|
*/
|
|
for (ucSlotNumber=0;ucSlotNumber<PCI_MAX_DEVICES;ucSlotNumber++) {
|
|
pci_read_config_dword(0, ucSlotNumber, 0, PCI_VENDOR_ID, &ulDeviceID);
|
|
if (ulDeviceID==PCI_INVALID_VENDORDEVICEID) {
|
|
/* This slot is empty */
|
|
continue;
|
|
}
|
|
pci_read_config_byte(0, ucSlotNumber, 0, PCI_HEADER_TYPE, &ucHeader);
|
|
if (ucHeader&PCI_HEADER_TYPE_MULTI_FUNCTION) {
|
|
ucNumFuncs=PCI_MAX_FUNCTIONS;
|
|
} else {
|
|
ucNumFuncs=1;
|
|
}
|
|
for (ucFnNumber=0;ucFnNumber<ucNumFuncs;ucFnNumber++) {
|
|
pci_read_config_dword(0, ucSlotNumber, ucFnNumber,
|
|
PCI_VENDOR_ID, &ulDeviceID);
|
|
if (ulDeviceID==PCI_INVALID_VENDORDEVICEID) {
|
|
/* This slot/function is empty */
|
|
continue;
|
|
}
|
|
|
|
/* This slot/function has a device fitted. */
|
|
pci_read_config_dword(0, ucSlotNumber, ucFnNumber,
|
|
PCI_CLASS_REVISION, &ulClass);
|
|
ulClass >>= 16;
|
|
if (ulClass == PCI_CLASS_BRIDGE_PCI) {
|
|
/* We have found a PCI-PCI bridge */
|
|
pci_read_config_byte(0, ucSlotNumber, ucFnNumber,
|
|
PCI_SUBORDINATE_BUS, &ucMaxSubordinate);
|
|
if (ucMaxSubordinate>ucMaxPCIBus) {
|
|
ucMaxPCIBus=ucMaxSubordinate;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
return PCIB_ERR_SUCCESS;
|
|
}
|
|
|
|
/*
|
|
* Return the number of PCI busses in the system
|
|
*/
|
|
unsigned char pci_bus_count(void)
|
|
{
|
|
return (ucMaxPCIBus+1);
|
|
}
|