forked from Imagelibrary/rtems
Add directives to get and set the priority of an interrupt vector. Implement the directives for the following BSP families: * arm/lpc24xx * arm/lpc32xx * powerpc/mpc55xxevb * powerpc/qoriq Implement the directives for the following interrupt controllers: * GICv2 and GICv3 (arm and aarch64) * NVIC (arm) * PLIC (riscv) Update #5002.
185 lines
5.0 KiB
C
185 lines
5.0 KiB
C
/* SPDX-License-Identifier: BSD-2-Clause */
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/*
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* COPYRIGHT (c) 2012-2015
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* Cobham Gaisler
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include <bsp.h>
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#include <bsp/irq-generic.h>
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#include <rtems/score/processormaskimpl.h>
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static inline int bsp_irq_cpu(int irq)
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{
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return 0;
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}
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bool bsp_interrupt_is_valid_vector(rtems_vector_number vector)
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{
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if (vector == 0) {
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return false;
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}
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return vector <= BSP_INTERRUPT_VECTOR_MAX_STD;
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}
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void bsp_interrupt_facility_initialize(void)
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{
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/* Nothing to do */
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}
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static bool is_maskable(rtems_vector_number vector)
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{
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return vector != 15;
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}
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rtems_status_code bsp_interrupt_get_attributes(
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rtems_vector_number vector,
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rtems_interrupt_attributes *attributes
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)
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{
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attributes->is_maskable = is_maskable(vector);
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attributes->can_enable = true;
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attributes->maybe_enable = true;
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attributes->can_disable = is_maskable(vector);
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attributes->maybe_disable = is_maskable(vector);
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attributes->can_raise = true;
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attributes->can_raise_on = true;
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attributes->can_clear = true;
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attributes->cleared_by_acknowledge = true;
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attributes->can_set_affinity = true;
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return RTEMS_SUCCESSFUL;
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}
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rtems_status_code bsp_interrupt_is_pending(
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rtems_vector_number vector,
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bool *pending
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)
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{
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bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
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bsp_interrupt_assert(pending != NULL);
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*pending = BSP_Is_interrupt_pending(vector) ||
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BSP_Is_interrupt_forced(vector);
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return RTEMS_SUCCESSFUL;
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}
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rtems_status_code bsp_interrupt_raise(rtems_vector_number vector)
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{
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bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
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BSP_Force_interrupt(vector);
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return RTEMS_SUCCESSFUL;
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}
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#if defined(RTEMS_SMP)
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rtems_status_code bsp_interrupt_raise_on(
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rtems_vector_number vector,
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uint32_t cpu_index
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)
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{
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bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
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BSP_Force_interrupt(vector);
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return RTEMS_SUCCESSFUL;
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}
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#endif
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rtems_status_code bsp_interrupt_clear(rtems_vector_number vector)
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{
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bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
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BSP_Clear_forced_interrupt(vector);
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BSP_Clear_interrupt(vector);
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return RTEMS_SUCCESSFUL;
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}
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rtems_status_code bsp_interrupt_vector_is_enabled(
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rtems_vector_number vector,
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bool *enabled
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)
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{
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bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
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bsp_interrupt_assert(enabled != NULL);
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*enabled = !BSP_Cpu_Is_interrupt_masked(vector, bsp_irq_cpu(vector));
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return RTEMS_SUCCESSFUL;
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}
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rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector)
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{
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bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
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BSP_Cpu_Unmask_interrupt(vector, 0);
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return RTEMS_SUCCESSFUL;
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}
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rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector)
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{
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bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
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if (!is_maskable(vector)) {
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return RTEMS_UNSATISFIED;
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}
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BSP_Cpu_Mask_interrupt(vector, 0);
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return RTEMS_SUCCESSFUL;
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}
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rtems_status_code bsp_interrupt_set_priority(
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rtems_vector_number vector,
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uint32_t priority
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)
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{
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bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
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return RTEMS_UNSATISFIED;
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}
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rtems_status_code bsp_interrupt_get_priority(
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rtems_vector_number vector,
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uint32_t *priority
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)
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{
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bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
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bsp_interrupt_assert(priority != NULL);
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return RTEMS_UNSATISFIED;
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}
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#if defined(RTEMS_SMP)
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rtems_status_code bsp_interrupt_get_affinity(
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rtems_vector_number vector,
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Processor_mask *affinity
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)
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{
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(void) vector;
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_Processor_mask_From_index( affinity, 0 );
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return RTEMS_UNSATISFIED;
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}
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rtems_status_code bsp_interrupt_set_affinity(
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rtems_vector_number vector,
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const Processor_mask *affinity
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)
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{
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(void) vector;
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(void) affinity;
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return RTEMS_UNSATISFIED;
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}
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#endif
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