QEMU is now stricter with MMIO sizes and accesses. uintptr_t on RV64
is 8 bytes and generates an sd instruction that Store/AMO faults
because sifive_test MMIO expects 4 bytes accesses.
In a multi-processor system we must broadcast the TLB maintenance operation to
the Inner Shareable domain to ensure that the other processors update their TLB
caches accordingly.
Close#4068.
The external UART over SPI device SC16IS752 uses the interrupt server
for interrupt processing. The interrupt server is also heavily used by
libbsd. The interrupt processing for the SC16IS752 is time critical and
doesn't work if network traffic is processed at the same priority.
With #4033 custom interrupt servers are available. Change
atsam_sc16is752_spi_create() to support user-defined interrupt servers.
Introduced atsam_sc16is752_spi_config to cut down the argument count of
this function.
Close#4039.
Add rtems_interrupt_server_destroy().
Before this patch, the only way to create interrupt servers was
rtems_interrupt_server_initialize(). This function creates the default
interrupt server and in SMP configurations additional interrupt servers
for the additional processors. The interrupt server is heavily used by
libbsd. This includes the epoch based reclamation which performs time
consuming resource and memory deallocation work. This does not work well
with time critical services, for example an UART over SPI or I2C. One
approach to address this problem is to allow the application to create
custom interrupt servers with the right priority and task properties.
The interrupt server API accounted for this, however, it was not
implemented before this patch.
Close#4034.
The chip select lines of the iMX SPI module doesn't work well for a
generic API like the one RTEMS uses. The existing solution only worked
in some special cases and had odd bugs when trying transfers of
different sizes (like deselecting between each byte for lengths that are
not dividable by 4).
With this patch the same approach like on FreeBSD or Linux is used:
Treat the CS lines as GPIOs.
Update 3869
Having a duplicate header with the shared includes is a build system
inconsistency. You may use one header file to build the libraries and
another one is installed (overwriting the other).
Update #3269.
If we interrupt a thread dispatch critical section (thread dispatch
disable level != ISR nest level), then we should not do the fast idle
mode since this may delay an ongoing system call forever.
Remove superflous __atexit stuff in start.o. It is no longer required
by GCC and may cause linker problems.
See GCC commit:
commit 362c63a5e8b5aacfff3e5af0911e42ba7c775042
Author: Geoff Keating <geoffk@cygnus.com>
Date: Fri Apr 14 23:16:25 2000 +0000
GCC 10 no longer passes -many to the assembler. This enables more
checks in the assembler.
The 0 in the tlbie instruction is the L operand which selects a 4KiB
page size.
- Fixes timeout for smpipi01 where:
+ Main thread sends perform jobs to worker cpu while it is already
performing jobs
+ Interrupt on worker cpu performs jobs, but with empty job list
+ Worker cpu continues to execut previous job and adds new job list
to itself, which is never performed, since the interrupt has already
been handled
+ Main thread blocks forever on barrier D
- Do not forward Clock_isr through Clock_driver_support_at_tick as this
will cause every processor to send IPIs with Clock_isr therby creating
an infinie loop
- Instead the processor handling the clock interrupt causes all other
processors to call rtems_timecounter_tick to update their tick count
Create a GS segment in the GDT for each processor for storing TLS.
This makes the GDT in startAP.S obsolete as all processors now share the
same GDT, which is passed to each AP at startup.
The correct segment for each processor is calculated in cpu_asm.S.
Update #3335
start16.S is now only used for SMP configurations to start the
application processors.
This commit removes all unnecessary parts for this job,
i.e. video conssole initalisation, A20 gate activation
and all non-AP related code.
Update #3335
