Sebastian Huber
b8662cf632
bsps/arm: Do not build unused file
2014-09-08 07:53:03 +02:00
Sebastian Huber
b802353c33
bsp/leon3: Include missing header file
2014-09-08 07:53:03 +02:00
Sebastian Huber
ddf8d1297f
libchip/dwmac: Use RTEMS_DEVOLATILE()
2014-09-08 07:53:02 +02:00
Joel Sherrill
4d69276a63
nios2_iss/Makefile.am: Add cache
2014-09-04 09:08:05 -05:00
Joel Sherrill
ce134f7489
score603e/start/start.S: Add start symbol to eliminate warning
2014-09-04 09:08:05 -05:00
Joel Sherrill
ae03ad2606
mcf5235/.../linkcmds: Use dram region consistently like other variants
...
"ram" and "dram" regions were used inconsistently. Most variants
used the "dram" memory region so this was changed to be consistent.
2014-09-04 09:08:04 -05:00
Joel Sherrill
78364c7db3
tms570/Makefile.am: Remove bad networking build info
2014-09-04 09:08:04 -05:00
Joel Sherrill
4761761cfb
lpc23xx_tli800-testsuite.tcfg: Add tests which do not link with debug enabled
2014-09-04 09:08:04 -05:00
Joel Sherrill
f58f6a7a96
lpc2362-testsuite.tcfg: Add tests which do not link with debug enabled
2014-09-04 09:08:04 -05:00
Joel Sherrill
4058aa0f41
lm3s3749-testsuite.tcfg: Add tests which do not link with debug enabled
2014-09-04 09:08:04 -05:00
Joel Sherrill
9f144dda00
rtl22xx/.../bspreset.c: Eliminate warning for set not used variable
2014-09-04 09:07:57 -05:00
Joel Sherrill
88d9f1cb1d
lpc24xx/.../bspreset.c: Eliminate warning for set not used variable
2014-09-04 09:07:56 -05:00
Joel Sherrill
3e0638f153
lpc176x/.../bspreset.c: Eliminate warning for set not used variable
2014-09-04 09:07:56 -05:00
Joel Sherrill
6fc2ea3757
lm3s69xx/.../bspreset.c: Eliminate warning for set not used variable
2014-09-04 09:07:56 -05:00
Joel Sherrill
08bcf01c3b
smdk2410/.../bspreset.c: Eliminate warning for set not used variable
2014-09-04 09:07:56 -05:00
Joel Sherrill
59cb7e9f0c
stm32f4/.../bspreset.c: Eliminate warning for set not used variable
2014-09-04 09:07:56 -05:00
Joel Sherrill
2f8c267615
gp32/.../bspreset.c: Eliminate warning for set not used variable
2014-09-04 09:07:56 -05:00
Joel Sherrill
3d05302955
csb337/.../bspreset.c: Eliminate warning for set not used variable
2014-09-04 09:07:56 -05:00
Joel Sherrill
be4992b193
raspberrypi: Use shared bspreset.c
2014-09-04 09:07:56 -05:00
Joel Sherrill
2617cd3e04
or1ksim/Makefile.am: Install shared tm27.h and regenerate preinstall.am
2014-09-02 10:57:18 -05:00
Daniel Cederman
fecaeca18b
score: Define _CPU_Start_multitasking only for LEON SPARC, not SPARC in general
...
Rename _BSP_Start_multitasking to _LEON3_Start_multitasking to show that
it is LEON specific
2014-09-01 08:11:11 +02:00
Sebastian Huber
aacb7e6aff
bsp/ngmp: Use -mcpu=leon3 GCC option
...
There is support for the LEON3 processor available in Binutils 2.24 and
the GCC 4.8 branch and GCC mainline.
GCC 4.8 branch:
http://gcc.gnu.org/viewcvs/gcc/branches/?view=log&pathrev=205331
GCC mainline:
http://gcc.gnu.org/viewcvs/gcc/trunk/?view=log&pathrev=202664
It is mandatory to use this option for SMP on LEON3 since it enables
usage of C11 atomic operations. It makes it also possible to use an
inline function for _CPU_SMP_Get_current_processor() which avoids the
function call overhead in critical sections.
2014-09-01 08:00:35 +02:00
Chris Johns
59990cc975
Regenerate all preinstall.am files.
...
With this patch the preinstall.am files are in a set order and not
dependent on now perl implements a hash.
2014-08-29 12:48:01 +10:00
Joel Sherrill
b597c0d60c
Regenerate all preinstall.am files.
...
Apparently, at some point automake output changed and these were
not updated.
2014-08-28 08:44:52 -05:00
Chris Johns
d04cb1242d
arm: Add tests which fail to build with C++ enabled.
2014-08-28 14:34:10 +10:00
Chris Johns
5826a1b284
preinstall: Regenerated files differ from the repo.
2014-08-28 10:08:28 +10:00
Joel Sherrill
bfa2b8c39e
virtex5/.../bsp.h: Add BSP_Convert_decrementer() macro required by MPC6xx timer driver
2014-08-27 12:50:36 -05:00
Joel Sherrill
6e60140daf
nds/Makefile.am: Rework to avoid creating ltos of .rel files
...
This was necessary to enable all tests to link.
2014-08-27 11:00:12 -05:00
Joel Sherrill
7d3a345630
lpc40xx_ea_rom_int-testsuite.tcfg: New file
2014-08-27 10:20:12 -05:00
Chris Johns
614a0889b6
arm/lm3s3749: Add tests that do not fit.
...
You need --enable-c++ for the c++ tests.
2014-08-27 20:04:26 +10:00
Hesham ALMatary
2cd68a8bf6
Add or1ksim (sim.cfg) configuration file and edit README.
...
OpenRISC/or1ksim BSP: The new sim.cfg file configures or1ksim emulator with HW
capabilities that the current RTEMS/or1ksim BSP supports.
README: HOWTO run the or1ksim simulator.
2014-08-26 15:32:44 -05:00
Sebastian Huber
76386c1047
bsp/altera-cyclone-v: Add DMA support hwlib files
2014-08-26 17:10:18 +02:00
Sebastian Huber
9907ddeb5a
bsp/altera-cyclone-v: Update to hwlib 13.1
...
This version is distributed with SoC EDS 14.0.0.200.
2014-08-26 17:10:18 +02:00
Joel Sherrill
8f1bdcb9ad
or1k/Makefile.am: libbsp_a_CPPFLAGS was defined twice
2014-08-25 17:07:12 -05:00
Joel Sherrill
3d99c17deb
gensh4: Improve ROM vs RAM startup configuration
2014-08-25 17:00:49 -05:00
Joel Sherrill
bf1f876483
gensh4/bsp_specs: Account for big/little endian
2014-08-25 17:00:48 -05:00
Joel Sherrill
e75907d58e
simsh4-testsuite.tcfg: new file
2014-08-25 17:00:48 -05:00
Joel Sherrill
d26cded81b
simsh2e-testsuite.tcfg: new file
2014-08-25 17:00:48 -05:00
Joel Sherrill
a4d355b426
shsim/bsp_specs: Account for big/little endian
2014-08-25 17:00:48 -05:00
Hesham ALMatary
baa3c91ecb
or1ksim BSP: Include cache manager stubs, and re-generate preinstall.am files.
2014-08-25 11:13:55 -05:00
Hesham ALMatary
9d92a43ff7
Rename or1k_or1ksim BSP to or1ksim
2014-08-25 11:13:14 -05:00
Hesham ALMatary
eeea9e30a2
libcpu: Add new entry for or1k cpu and include cache manager stubs.
2014-08-25 11:12:20 -05:00
Sebastian Huber
4b104834eb
bsp/mpc55xx: Fix comment
2014-08-25 13:40:20 +02:00
Sebastian Huber
f3237a3c3b
bsp/mpc55xx: Add defines for MPC5668
2014-08-25 09:30:53 +02:00
Sebastian Huber
0a31483901
bsp/mpc55xx: Limit flash support to MPC55[56]X
2014-08-25 09:11:05 +02:00
Daniel Cederman
e7a42a0cfb
score: Add missing define to cache manager
2014-08-25 08:52:05 +02:00
Pavel Pisa
d13ce7553b
bsp/tms570: implemented and tested initialization of Cortex-R performance counters.
...
The code is written as BSP specific now but it should work for all
Cortex-A and R based CPUs and can be moved to ARM generic place in future.
StackOverflow suggested sequences of writes to the registers required
to start counters is used.
http://stackoverflow.com/questions/3247373/how-to-measure-program-execution-time-in-arm-cortex-a8-processor
2014-08-22 10:24:53 -05:00
Daniel Cederman
ddbc3f8d83
score: Add SMP support to the cache manager
...
Adds functions that allows the user to specify which cores that should
perform the cache operation. SMP messages are sent to all the specified
cores and the caller waits until all cores have acknowledged that they
have flushed their cache. If CPU_CACHE_NO_INSTRUCTION_CACHE_SNOOPING is
defined the instruction cache invalidation function will perform the
operation on all cores using the previous method.
2014-08-22 13:10:59 +02:00
Daniel Cederman
62f373fb57
bsp/sparc: Flush only instruction cache
...
The flush instruction on LEON flushes both the data and the instruction
cache. Flushing of just the instruction cache can be done by setting
the "flush instruction cache" bit in the cache control register.
2014-08-22 13:10:59 +02:00
Daniel Cederman
54f3476e24
bsp/sparc: Flush icache before first time enabling interrupts
...
A secondary processor might miss changes done to the trap table
if the instruction cache is not flushed. Once interrupts are enabled
any other required cache flushes can be ordered via the cache
manager.
2014-08-22 13:10:59 +02:00
