We observed a strange behavior of the 1Hz timer when running cFS on Zynq
RPU. After some investigation, we reduced the error to the truncation
issue. This patch fixes the issue.
When resetting the QSPI FIFOs, the driver was reading write-only bits of
a register for status information when it was actually in a different
register. This corrects the driver so that it reads the correct status
bits.
Add an opportunistic page cache to the xnandpsu driver since it does not
implement partial page reads and common filesystem access patterns
perform multiple reads from the same page. This has been seen to provide
a 10x speedup to read speeds and a 2x speedup on first initialization
when used with JFFS2.
This fixes a logic inversion that was preventing creation of a Bad Block
Table (BBT) from scratch on devices that lack one. This was discovered
during upstream integration testing. The BBT management layer in this
driver is not designed to be easily testable other than on real hardware.
Stacked mode doubles the number of sectors and device size while
parallel mode doubles the sector size and the device size. Make sure
that this is accounted for in the device size accessor.
`tms570_sci_interrupt_handler()` is called when an RX interrupt fires. It checks
in the register `FLR`, the `RXRDY` bit (Receiver ready flag - indicate that the
SCIRD contains new data). If it is set, it calls
`tms570_sci_read_received_chars()`.
`tms570_sci_read_received_chars()` checks the register `RD` against 0. If it is
non zero, it returns 1 to indicate that one byte was read.
In the old behavior, if it is zero, the function returns 0 to indicate that no
data was read.
The new behavior is to not silently drop 0x00 bytes. Ignoring 0x00 bytes is fine
when working with printable text (which, I assume, is how this driver was
tested), but as soon as the UART is used in non canonical (raw) mode, with
potentially 0x00 bytes, these bytes will be silently dropped, causing issues in
the data/protocol layer above.
Update #4982.
This enables the VME support for the MVME2500. Note that the PCIe
support from libbsd is used. So you need the related libbsd patches for
this to work.
If the drivers in libbsd are not enabled, the linker should not pick up
anything from this patch.
Add a function that allows to set the polarity (active-low / negative
edge triggered or active-high / positive edge triggered) and sense
(level or edge sensitive) of the external interrupts.
Do not set pins to the default function before the actual setting is
applied. If a pin setting needs to be done in a certain order, then
this should be done explicitly through multiple calls to
tms570_bsp_pinmmr_config().
Update #4982.
Remove obsolete tms570ls3137_hdk_with_loader BSP variant. With the new
memory origin/size build options this variant is no longer required.
Update #4982.
